| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | rk3036-cru.h | 20 #define SCLK_SDIO 69 macro
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| A D | rk3188-cru-common.h | 29 #define SCLK_SDIO 73 macro
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| A D | rk3128-cru.h | 23 #define SCLK_SDIO 69 macro
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| A D | rk3228-cru.h | 21 #define SCLK_SDIO 69 macro
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| A D | rv1108-cru.h | 20 #define SCLK_SDIO 69 macro
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| A D | px30-cru.h | 58 #define SCLK_SDIO 56 macro
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| A D | rk3308-cru.h | 57 #define SCLK_SDIO 53 macro
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| A D | rk3328-cru.h | 23 #define SCLK_SDIO 34 macro
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| A D | rk3399-cru.h | 34 #define SCLK_SDIO 77 macro
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| /linux-6.3-rc2/drivers/clk/rockchip/ |
| A D | clk-rk3036.c | 292 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
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| A D | clk-rk3128.c | 323 COMPOSITE(SCLK_SDIO, "sclk_sdio", mux_mmc_src_p, 0,
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| A D | clk-rk3228.c | 389 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
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| A D | clk-rk3188.c | 401 COMPOSITE_NOMUX(SCLK_SDIO, "sclk_sdio", "hclk_peri", 0,
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| A D | clk-rk3328.c | 627 COMPOSITE(SCLK_SDIO, "clk_sdio", mux_2plls_24m_u480m_p, 0,
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| A D | clk-rv1108.c | 722 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
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| A D | clk-px30.c | 487 COMPOSITE_NODIV(SCLK_SDIO, "clk_sdio", mux_sdio_p,
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| A D | clk-rk3308.c | 505 COMPOSITE_NODIV(SCLK_SDIO, "clk_sdio", mux_sdio_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
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| A D | clk-rk3399.c | 894 COMPOSITE(SCLK_SDIO, "clk_sdio", mux_pll_src_cpll_gpll_npll_ppll_upll_24m_p, 0,
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | rk3xxx.dtsi | 225 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
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| A D | rk3036.dtsi | 264 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | rk3128.dtsi | 146 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | rv1108.dtsi | 486 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | rk322x.dtsi | 763 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| /linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
| A D | rk3328.dtsi | 799 <&cru SCLK_SDIO>, <&cru SCLK_TSP>,
882 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | px30.dtsi | 300 <&cru SCLK_SDIO>,
1005 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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