Searched refs:SCLK_UART4 (Results 1 – 21 of 21) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | px30-cru.h | 29 #define SCLK_UART4 27 macro
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| A D | rk3288-cru.h | 36 #define SCLK_UART4 81 macro
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| A D | rk3308-cru.h | 25 #define SCLK_UART4 21 macro
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| A D | rk3368-cru.h | 34 #define SCLK_UART4 81 macro
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| A D | rockchip,rv1126-cru.h | 94 #define SCLK_UART4 28 macro
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| A D | rockchip,rk3588-cru.h | 198 #define SCLK_UART4 183 macro
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| A D | rk3568-cru.h | 362 #define SCLK_UART4 299 macro
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | rv1126.dtsi | 288 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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| A D | rk3288.dtsi | 437 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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| /linux-6.3-rc2/drivers/clk/rockchip/ |
| A D | clk-rk3368.c | 271 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
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| A D | clk-rk3288.c | 279 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
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| A D | clk-px30.c | 710 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", CLK_SET_RATE_PARENT,
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| A D | clk-rk3308.c | 377 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", 0,
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| A D | clk-rv1126.c | 494 GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0,
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| A D | clk-rk3568.c | 1244 GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0,
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| A D | clk-rk3588.c | 1262 GATE(SCLK_UART4, "sclk_uart4", "clk_uart4", 0,
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| /linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
| A D | rk3368.dtsi | 364 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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| A D | rk3308.dtsi | 347 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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| A D | rk3588s.dtsi | 1342 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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| A D | rk356x.dtsi | 1370 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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| A D | px30.dtsi | 545 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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Completed in 49 milliseconds