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Searched refs:SCLK_UART5 (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dpx30-cru.h30 #define SCLK_UART5 28 macro
A Drockchip,rv1126-cru.h98 #define SCLK_UART5 32 macro
A Drockchip,rk3588-cru.h202 #define SCLK_UART5 187 macro
A Drk3568-cru.h366 #define SCLK_UART5 303 macro
/linux-6.3-rc2/arch/arm/boot/dts/
A Drv1126.dtsi304 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-px30.c723 GATE(SCLK_UART5, "clk_uart5", "clk_uart5_mux", CLK_SET_RATE_PARENT,
A Dclk-rv1126.c505 GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
A Dclk-rk3568.c1256 GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
A Dclk-rk3588.c1271 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk3588s.dtsi1357 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
A Drk356x.dtsi1384 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
A Dpx30.dtsi560 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;

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