| /linux-6.3-rc2/drivers/mmc/host/ |
| A D | sdhci-milbeaut.c | 92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
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| A D | sdhci-pci-o2micro.c | 255 sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
272 sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
283 SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
338 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
340 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
359 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
361 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
550 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
555 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
569 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
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| A D | sdhci-of-at91.c | 76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
90 1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) { in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
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| A D | sdhci-s3c.c | 269 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); in sdhci_s3c_set_clock()
380 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
387 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
389 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
399 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
403 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cmu_set_clock()
415 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
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| A D | sdhci-sprd.c | 167 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
170 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
177 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
179 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
225 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
281 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
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| A D | sdhci-pci-gli.c | 453 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
636 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
996 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
998 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1012 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
1016 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
1020 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) { in gl9763e_runtime_resume()
1027 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
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| A D | sdhci_f_sdh30.c | 70 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
71 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
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| A D | sdhci-pci-dwc-mshc.c | 70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
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| A D | sdhci-xenon-phy.c | 609 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
611 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
633 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
635 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
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| A D | sdhci-xenon.c | 30 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
32 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
38 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
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| A D | sdhci.c | 75 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
1898 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_calc_clk()
1983 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
1990 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2006 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2013 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2028 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2038 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_set_clock()
2417 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
2420 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
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| A D | sdhci-of-arasan.c | 904 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
906 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
911 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
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| A D | sdhci-brcmstb.c | 89 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
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| A D | sdhci-esdhc-mcf.c | 274 esdhc_clrset_be(host, 0x0000fff7, temp, SDHCI_CLOCK_CONTROL); in esdhc_mcf_pltfm_set_clock()
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| A D | sdhci-of-aspeed.c | 249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
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| A D | sdhci.h | 110 #define SDHCI_CLOCK_CONTROL 0x2C macro
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| A D | sdhci-tegra.c | 257 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
268 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
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| A D | sdhci-msm.c | 1767 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
1777 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
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| A D | sdhci-esdhc-imx.c | 691 case SDHCI_CLOCK_CONTROL: in esdhc_writew_le()
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