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Searched refs:SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdkfd/
A Dkfd_mqd_manager_cik.c240 q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | in update_mqd_sdma()
A Dkfd_mqd_manager_v10.c334 q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | in update_mqd_sdma()
A Dkfd_mqd_manager_v9.c397 q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | in update_mqd_sdma()
A Dkfd_mqd_manager_vi.c374 q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT | in update_mqd_sdma()
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma0/
A Dsdma0_4_1_sh_mask.h1293 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT macro
A Dsdma0_4_0_sh_mask.h1487 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
A Dsdma0_4_2_sh_mask.h1495 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT macro
A Dsdma0_4_2_2_sh_mask.h1505 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/
A Doss_2_0_sh_mask.h1172 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
A Doss_2_4_sh_mask.h1292 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
A Doss_3_0_1_sh_mask.h1740 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
A Doss_3_0_sh_mask.h2056 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT 0x18 macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma/
A Dsdma_4_4_0_sh_mask.h1289 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
A Dgc_10_1_0_sh_mask.h1277 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT macro
A Dgc_10_3_0_sh_mask.h1306 #define SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT macro

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