Searched refs:SDMA1 (Results 1 – 12 of 12) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | sdma_v4_0.c | 103 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100),
104 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100),
106 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_IB_CNTL, 0x800f0100, 0x00000100),
108 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_POWER_CNTL, 0x003ff000, 0x0003c000),
109 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_IB_CNTL, 0x800f0100, 0x00000100),
111 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_IB_CNTL, 0x800f0100, 0x00000100),
113 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_PAGE, 0x000003ff, 0x000003c0),
114 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_WATERMK, 0xfc000000, 0x00000000)
121 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831d07),
188 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100),
[all …]
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| A D | amdgpu_amdkfd_arcturus.c | 83 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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| A D | amdgpu_amdkfd_gfx_v11.c | 136 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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| A D | amdgpu_amdkfd_gfx_v10.c | 170 SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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| A D | amdgpu_amdkfd_gfx_v9.c | 196 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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| A D | soc21.c | 242 { SOC15_REG_ENTRY(SDMA1, 0, regSDMA1_STATUS_REG)},
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| A D | nv.c | 394 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
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| A D | sdma_v2_4.c | 281 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v2_4_ring_emit_hdp_flush()
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| A D | soc15.c | 386 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
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| A D | sdma_v3_0.c | 455 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v3_0_ring_emit_hdp_flush()
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | cik_sdma.c | 179 ref_and_mask = SDMA1; in cik_sdma_hdp_flush_ring_emit()
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| A D | cikd.h | 861 #define SDMA1 (1 << 11) macro
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