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Searched refs:SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma1/
A Dsdma1_4_0_sh_mask.h540 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
A Dsdma1_4_2_2_sh_mask.h542 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro
A Dsdma1_4_2_sh_mask.h538 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/
A Doss_2_0_sh_mask.h1486 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
A Doss_2_4_sh_mask.h1650 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
A Doss_3_0_1_sh_mask.h2168 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
A Doss_3_0_sh_mask.h2472 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma/
A Dsdma_4_4_0_sh_mask.h3045 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
A Dgc_11_0_0_sh_mask.h2751 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro
A Dgc_11_0_3_sh_mask.h2824 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro
A Dgc_10_1_0_sh_mask.h3020 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro
A Dgc_10_3_0_sh_mask.h3129 #define SDMA1_STATUS1_REG__CE_SPLIT_IDLE__SHIFT macro

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