Searched refs:SDRAM (Results 1 – 25 of 65) sorted by relevance
123
| /linux-6.3-rc2/arch/arm/mach-pxa/ |
| A D | sleep.S | 55 @ prepare SDRAM refresh settings
59 @ enable SDRAM self-refresh mode
96 @ prepare SDRAM refresh settings
100 @ enable SDRAM self-refresh mode
107 @ We keep the change-down close to the actual suspend on SDRAM
160 @ external accesses after SDRAM is put in self-refresh mode
166 @ put SDRAM into self-refresh
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| /linux-6.3-rc2/Documentation/devicetree/bindings/arm/altera/ |
| A D | socfpga-sdram-edac.txt | 1 Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
2 The EDAC accesses a range of registers in the SDRAM controller.
7 - interrupts : Should contain the SDRAM ECC IRQ in the
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| A D | socfpga-sdram-controller.txt | 1 Altera SOCFPGA SDRAM Controller
5 syscon is required by the Altera SOCFPGA SDRAM EDAC.
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| /linux-6.3-rc2/Documentation/driver-api/memory-devices/ |
| A D | ti-emif.rst | 4 TI EMIF SDRAM Controller Driver
29 SoCs. EMIF is an SDRAM controller that, based on its revision,
30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
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| /linux-6.3-rc2/Documentation/devicetree/bindings/arm/omap/ |
| A D | dmm.txt | 4 SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
5 accesses such as priority generation amongst initiators, configuration of SDRAM
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| /linux-6.3-rc2/drivers/memory/ |
| A D | Kconfig | 20 Data from JEDEC specs for DDR SDRAM memories,
23 DDR SDRAM controllers.
34 bool "Atmel (Multi-port DDR-)SDRAM Controller"
39 This driver is for Atmel SDRAM Controller or Atmel Multi-port
40 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
107 SoCs. EMIF is an SDRAM controller that, based on its revision,
108 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
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| /linux-6.3-rc2/Documentation/devicetree/bindings/memory-controllers/ti/ |
| A D | emif.txt | 1 * EMIF family of TI SDRAM controllers
3 EMIF - External Memory Interface - is an SDRAM controller used in
57 has capability for generating SDRAM temperature alerts
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| /linux-6.3-rc2/drivers/video/fbdev/omap/ |
| A D | Kconfig | 44 bool "Set DMA SDRAM access priority high"
48 (SDRAM) this will speed up graphics DMA operations.
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | r7s9210-rza2mevb.dts | 8 * Hence the 64 MiB of SDRAM on the sub-board needs to be enabled, which has
22 * SW6 SW6-1 set to SDRAM
84 reg = <0x0c000000 0x04000000>; /* SDRAM */
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| /linux-6.3-rc2/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| A D | jedec,lpddr-props.yaml | 48 Density in megabits of SDRAM chip. Decoded from Mode Register 8.
68 IO bus width in bits of SDRAM chip. Decoded from Mode Register 8.
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| A D | jedec,lpddr2.yaml | 7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
37 Revision 1 value of SDRAM chip. Obtained from device datasheet.
45 Revision 2 value of SDRAM chip. Obtained from device datasheet.
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| A D | jedec,lpddr4.yaml | 7 title: LPDDR4 SDRAM compliant to JEDEC JESD209-4
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| A D | jedec,lpddr5.yaml | 7 title: LPDDR5 SDRAM compliant to JEDEC JESD209-5
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| /linux-6.3-rc2/Documentation/devicetree/bindings/fpga/ |
| A D | altera-fpga2sdram-bridge.txt | 1 Altera FPGA To SDRAM Bridge Driver
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| /linux-6.3-rc2/Documentation/devicetree/bindings/memory-controllers/ |
| A D | mediatek,mt7621-memc.yaml | 7 title: MT7621 SDRAM controller
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| A D | marvell,mvebu-sdram-controller.yaml | 7 title: Marvell MVEBU SDRAM controller
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| /linux-6.3-rc2/arch/arm/mach-lpc32xx/ |
| A D | suspend.S | 50 @ Wait for SDRAM busy status to go busy and then idle
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| /linux-6.3-rc2/Documentation/arm/stm32/ |
| A D | stm32f429-overview.rst | 13 - External memory support through FMC controller (PSRAM, SDRAM, NOR, NAND)
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| A D | stm32h743-overview.rst | 13 - FMC controller to connect SDRAM, NOR and NAND memories
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| A D | stm32h750-overview.rst | 13 - FMC controller to connect SDRAM, NOR and NAND memories
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| A D | stm32mp13-overview.rst | 19 - FMC controller to connect SDRAM, NOR and NAND memories
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| A D | stm32f746-overview.rst | 13 - FMC controller to connect SDRAM, NOR and NAND memories
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| /linux-6.3-rc2/arch/arm/mach-omap1/ |
| A D | sleep.S | 86 @ prepare to put SDRAM into self-refresh manually
156 @ Prepare to put SDRAM into self-refresh manually
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| /linux-6.3-rc2/Documentation/devicetree/bindings/clock/ |
| A D | mvebu-core-clock.txt | 30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
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| /linux-6.3-rc2/arch/arm/mach-omap2/ |
| A D | Kconfig | 152 bool "OMAP2 SDRAM Controller support"
263 access SDRAM during CORE DVFS, select Y here. This should boost
264 SDRAM performance at lower CORE OPPs. There are relatively few
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