Home
last modified time | relevance | path

Searched refs:SH_MEM_CONFIG (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/radeon/
A Dcik_sdma.c968 radeon_ring_write(ring, SH_MEM_CONFIG >> 2); in cik_dma_vm_flush()
A Dcikd.h1171 #define SH_MEM_CONFIG 0x8C34 macro
A Dcik.c5507 WREG32(SH_MEM_CONFIG, SH_MEM_CONFIG_GFX_DEFAULT); in cik_pcie_gart_enable()
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v7_0.c1918 sh_mem_cfg = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v7_0_constants_init()
1920 sh_mem_cfg = REG_SET_FIELD(sh_mem_cfg, SH_MEM_CONFIG, DEFAULT_MTYPE, in gfx_v7_0_constants_init()
1922 sh_mem_cfg = REG_SET_FIELD(sh_mem_cfg, SH_MEM_CONFIG, APE1_MTYPE, in gfx_v7_0_constants_init()
1924 sh_mem_cfg = REG_SET_FIELD(sh_mem_cfg, SH_MEM_CONFIG, PRIVATE_ATC, 0); in gfx_v7_0_constants_init()
A Dgfx_v8_0.c3760 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_UC); in gfx_v8_0_constants_init()
3761 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC); in gfx_v8_0_constants_init()
3762 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v8_0_constants_init()
3767 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_NC); in gfx_v8_0_constants_init()
3768 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC); in gfx_v8_0_constants_init()
3769 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v8_0_constants_init()
A Dgfx_v9_0.c2386 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v9_0_constants_init()
2388 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, RETRY_DISABLE, in gfx_v9_0_constants_init()
2393 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v9_0_constants_init()
2395 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, RETRY_DISABLE, in gfx_v9_0_constants_init()

Completed in 56 milliseconds