Searched refs:SMU_DCEFCLK (Results 1 – 9 of 9) sorted by relevance
222 case SMU_DCEFCLK: in renoir_get_dpm_clk_limited()567 case SMU_DCEFCLK: in renoir_print_clk_levels()592 case SMU_DCEFCLK: in renoir_print_clk_levels()
264 SMU_DCEFCLK, enumerator
1069 SMU_DCEFCLK, in navi10_set_default_dpm_table()1283 case SMU_DCEFCLK: in navi10_emit_clk_levels()1492 case SMU_DCEFCLK: in navi10_print_clk_levels()1687 case SMU_DCEFCLK: in navi10_force_clk_levels()1798 case SMU_DCEFCLK: in navi10_get_clock_by_type_with_latency()
868 SMU_DCEFCLK); in smu_v11_0_init_max_sustainable_clocks()1065 clk_select = SMU_DCEFCLK; in smu_v11_0_display_clock_voltage_request()
1054 SMU_DCEFCLK, in sienna_cichlid_set_default_dpm_table()1283 case SMU_DCEFCLK: in sienna_cichlid_print_clk_levels()1453 case SMU_DCEFCLK: in sienna_cichlid_force_clk_levels()
2000 clk_type = SMU_DCEFCLK; break; in smu_force_ppclk_levels()2387 clk_type = SMU_DCEFCLK; break; in smu_convert_to_smuclk()2707 clk_type = SMU_DCEFCLK; in smu_get_clock_by_type_with_latency()
944 SMU_DCEFCLK); in smu_v13_0_init_max_sustainable_clocks()1113 clk_select = SMU_DCEFCLK; in smu_v13_0_display_clock_voltage_request()
1159 case SMU_DCEFCLK: in smu_v13_0_7_force_clk_levels()
1229 case SMU_DCEFCLK: in smu_v13_0_0_force_clk_levels()
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