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Searched refs:SPRN_L2CSR0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/arch/powerpc/kernel/
A Dcpu_setup_e500.S306 mfspr r3, SPRN_L2CSR0
310 mtspr SPRN_L2CSR0,r3
314 1: mfspr r3,SPRN_L2CSR0
/linux-6.3-rc2/arch/powerpc/include/asm/
A Dreg_booke.h178 #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ macro

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