Searched refs:SPU (Results 1 – 15 of 15) sorted by relevance
1 The Broadcom Secure Processing Unit (SPU) hardware supports symmetric2 cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware7 brcm,spum-crypto - for devices with SPU-M hardware11 brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware13 - reg: Should contain SPU registers location and length.14 - mboxes: The mailbox channel to be used to communicate with the SPU.
27 ate(2) to address a specific SPU context. When the context gets sched-28 uled to a physical SPU, it starts execution at the instruction pointer31 Execution of SPU code happens synchronously, meaning that spu_run does32 not return while the SPU is still running. If there is a need to exe-63 on the SPU. The bit masks for the status codes are:66 SPU was stopped by stop-and-signal.69 SPU was stopped by halt.72 SPU is waiting for a channel.75 SPU is in single-step mode.78 SPU has tried to execute an invalid instruction.[all …]
10 spufs - the SPU file system16 The SPU file system is used on PowerPC machines that implement the Cell22 can use spu_create(2) to establish SPU contexts in the spufs root.24 Every SPU context is represented by a directory containing a predefined26 logical SPU. Users can change permissions on those files, but not actu-63 the contents of the local storage memory of the SPU. This can be65 data in the address space of the SPU. The possible operations on an159 npc requires an SPU context save and is therefore very inefficient.165 decr SPU Decrementer167 spu_tag_mask MFC tag mask for SPU DMA[all …]
26 Processor Units (SPUs). It creates a new logical context for an SPU in28 point to a non-existing directory in the mount point of the SPU file36 descriptor is closed, the logical SPU context is destroyed.42 Allow mapping of some of the hardware registers of the SPU into67 EEXIST An SPU context already exists at the given path name.87 ENOSPC There are not enough SPU resources available to create a new88 context or the user specific limit for the number of SPU con-
4 SPU Filesystem
46 tristate "SPU file system"52 The SPU file system is used to access Synergistic Processing96 tristate "CBE frequency scaling based on SPU usage"
894 DMAC1B, DMAC0B, I2C0, I2C1, SDHI0, SDHI1, SPU, MMCIF, enumerator1011 INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1),1061 TMU1_TUNI2, SPU } },
7 * SPU - Seat Power Unit
244 /* can the driver also handle SPU, NAVI and CSS encoded data?
728 Secure Processing Unit (SPU). The SPU driver registers skcipher,
81 3 processors on chip, Java ones, VPU, SPU, APU, maybe these are the124 - 0x9050: SPU control192 - Write 0x00000001 to register 0x9050 to stop the SPU.202 re-enable the SPU.
497 /* First part of the "SPU secure shared memory" region */503 /* Second part of the "SPU secure shared memory" region */
502 /* First part of the "SPU secure shared memory" region */508 /* Second part of the "SPU secure shared memory" region */
803 SPU
19744 SPU FILE SYSTEM
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