Searched refs:STBCR4 (Results 1 – 4 of 4) sorted by relevance
/linux-6.3-rc2/arch/sh/kernel/cpu/sh2a/ |
A D | clock-sh7269.c | 18 #define STBCR4 0xfffe040c macro 125 [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */ 126 [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */ 127 [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */ 128 [MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */ 129 [MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */ 130 [MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */ 131 [MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */ 132 [MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
|
A D | setup-sh7206.c | 279 #define STBCR4 0xfffe040c macro 284 __raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4); in plat_early_device_setup()
|
A D | setup-sh7203.c | 343 #define STBCR4 0xfffe040c macro 348 __raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4); in plat_early_device_setup()
|
A D | clock-sh7264.c | 18 #define STBCR4 0xfffe040c macro
|
Completed in 6 milliseconds