Searched refs:SVE_REG_SLICE_SHIFT (Results 1 – 1 of 1) sorted by relevance
382 #define SVE_REG_SLICE_SHIFT 0 macro384 #define SVE_REG_ID_SHIFT (SVE_REG_SLICE_SHIFT + SVE_REG_SLICE_BITS)388 GENMASK(SVE_REG_SLICE_SHIFT + SVE_REG_SLICE_BITS - 1, \389 SVE_REG_SLICE_SHIFT)
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