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Searched refs:SYS_CLK_UART1 (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dpistachio-clk.h159 #define SYS_CLK_UART1 11 macro
/linux-6.3-rc2/drivers/clk/pistachio/
A Dclk-pistachio.c286 GATE(SYS_CLK_UART1, "uart1_sys", "sys", 0x8, 11),
/linux-6.3-rc2/arch/mips/boot/dts/img/
A Dpistachio.dtsi272 clocks = <&clk_core CLK_UART1>, <&cr_periph SYS_CLK_UART1>;

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