1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright 2015-2017 Google, Inc
4 *
5 * USB Type-C Port Controller Interface.
6 */
7
8 #ifndef __LINUX_USB_TCPCI_H
9 #define __LINUX_USB_TCPCI_H
10
11 #include <linux/usb/typec.h>
12 #include <linux/usb/tcpm.h>
13
14 #define TCPC_VENDOR_ID 0x0
15 #define TCPC_PRODUCT_ID 0x2
16 #define TCPC_BCD_DEV 0x4
17 #define TCPC_TC_REV 0x6
18 #define TCPC_PD_REV 0x8
19 #define TCPC_PD_INT_REV 0xa
20
21 #define TCPC_ALERT 0x10
22 #define TCPC_ALERT_EXTND BIT(14)
23 #define TCPC_ALERT_EXTENDED_STATUS BIT(13)
24 #define TCPC_ALERT_VBUS_DISCNCT BIT(11)
25 #define TCPC_ALERT_RX_BUF_OVF BIT(10)
26 #define TCPC_ALERT_FAULT BIT(9)
27 #define TCPC_ALERT_V_ALARM_LO BIT(8)
28 #define TCPC_ALERT_V_ALARM_HI BIT(7)
29 #define TCPC_ALERT_TX_SUCCESS BIT(6)
30 #define TCPC_ALERT_TX_DISCARDED BIT(5)
31 #define TCPC_ALERT_TX_FAILED BIT(4)
32 #define TCPC_ALERT_RX_HARD_RST BIT(3)
33 #define TCPC_ALERT_RX_STATUS BIT(2)
34 #define TCPC_ALERT_POWER_STATUS BIT(1)
35 #define TCPC_ALERT_CC_STATUS BIT(0)
36
37 #define TCPC_ALERT_MASK 0x12
38 #define TCPC_POWER_STATUS_MASK 0x14
39 #define TCPC_FAULT_STATUS_MASK 0x15
40
41 #define TCPC_EXTENDED_STATUS_MASK 0x16
42 #define TCPC_EXTENDED_STATUS_MASK_VSAFE0V BIT(0)
43
44 #define TCPC_ALERT_EXTENDED_MASK 0x17
45 #define TCPC_SINK_FAST_ROLE_SWAP BIT(0)
46
47 #define TCPC_CONFIG_STD_OUTPUT 0x18
48
49 #define TCPC_TCPC_CTRL 0x19
50 #define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
51 #define PLUG_ORNT_CC1 0
52 #define PLUG_ORNT_CC2 1
53 #define TCPC_TCPC_CTRL_BIST_TM BIT(1)
54 #define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT BIT(6)
55
56 #define TCPC_EXTENDED_STATUS 0x20
57 #define TCPC_EXTENDED_STATUS_VSAFE0V BIT(0)
58
59 #define TCPC_ROLE_CTRL 0x1a
60 #define TCPC_ROLE_CTRL_DRP BIT(6)
61 #define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4
62 #define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3
63 #define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0
64 #define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1
65 #define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2
66 #define TCPC_ROLE_CTRL_CC2_SHIFT 2
67 #define TCPC_ROLE_CTRL_CC2_MASK 0x3
68 #define TCPC_ROLE_CTRL_CC1_SHIFT 0
69 #define TCPC_ROLE_CTRL_CC1_MASK 0x3
70 #define TCPC_ROLE_CTRL_CC_RA 0x0
71 #define TCPC_ROLE_CTRL_CC_RP 0x1
72 #define TCPC_ROLE_CTRL_CC_RD 0x2
73 #define TCPC_ROLE_CTRL_CC_OPEN 0x3
74
75 #define TCPC_FAULT_CTRL 0x1b
76
77 #define TCPC_POWER_CTRL 0x1c
78 #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
79 #define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3)
80 #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4)
81 #define TCPC_DIS_VOLT_ALRM BIT(5)
82 #define TCPC_POWER_CTRL_VBUS_VOLT_MON BIT(6)
83 #define TCPC_FAST_ROLE_SWAP_EN BIT(7)
84
85 #define TCPC_CC_STATUS 0x1d
86 #define TCPC_CC_STATUS_TOGGLING BIT(5)
87 #define TCPC_CC_STATUS_TERM BIT(4)
88 #define TCPC_CC_STATUS_TERM_RP 0
89 #define TCPC_CC_STATUS_TERM_RD 1
90 #define TCPC_CC_STATE_SRC_OPEN 0
91 #define TCPC_CC_STATUS_CC2_SHIFT 2
92 #define TCPC_CC_STATUS_CC2_MASK 0x3
93 #define TCPC_CC_STATUS_CC1_SHIFT 0
94 #define TCPC_CC_STATUS_CC1_MASK 0x3
95
96 #define TCPC_POWER_STATUS 0x1e
97 #define TCPC_POWER_STATUS_DBG_ACC_CON BIT(7)
98 #define TCPC_POWER_STATUS_UNINIT BIT(6)
99 #define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4)
100 #define TCPC_POWER_STATUS_VBUS_DET BIT(3)
101 #define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
102 #define TCPC_POWER_STATUS_VCONN_PRES BIT(1)
103 #define TCPC_POWER_STATUS_SINKING_VBUS BIT(0)
104
105 #define TCPC_FAULT_STATUS 0x1f
106
107 #define TCPC_ALERT_EXTENDED 0x21
108
109 #define TCPC_COMMAND 0x23
110 #define TCPC_CMD_WAKE_I2C 0x11
111 #define TCPC_CMD_DISABLE_VBUS_DETECT 0x22
112 #define TCPC_CMD_ENABLE_VBUS_DETECT 0x33
113 #define TCPC_CMD_DISABLE_SINK_VBUS 0x44
114 #define TCPC_CMD_SINK_VBUS 0x55
115 #define TCPC_CMD_DISABLE_SRC_VBUS 0x66
116 #define TCPC_CMD_SRC_VBUS_DEFAULT 0x77
117 #define TCPC_CMD_SRC_VBUS_HIGH 0x88
118 #define TCPC_CMD_LOOK4CONNECTION 0x99
119 #define TCPC_CMD_RXONEMORE 0xAA
120 #define TCPC_CMD_I2C_IDLE 0xFF
121
122 #define TCPC_DEV_CAP_1 0x24
123 #define TCPC_DEV_CAP_2 0x26
124 #define TCPC_STD_INPUT_CAP 0x28
125 #define TCPC_STD_OUTPUT_CAP 0x29
126
127 #define TCPC_MSG_HDR_INFO 0x2e
128 #define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3)
129 #define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0)
130 #define TCPC_MSG_HDR_INFO_REV_SHIFT 1
131 #define TCPC_MSG_HDR_INFO_REV_MASK 0x3
132
133 #define TCPC_RX_DETECT 0x2f
134 #define TCPC_RX_DETECT_HARD_RESET BIT(5)
135 #define TCPC_RX_DETECT_SOP BIT(0)
136 #define TCPC_RX_DETECT_SOP1 BIT(1)
137 #define TCPC_RX_DETECT_SOP2 BIT(2)
138 #define TCPC_RX_DETECT_DBG1 BIT(3)
139 #define TCPC_RX_DETECT_DBG2 BIT(4)
140
141 #define TCPC_RX_BYTE_CNT 0x30
142 #define TCPC_RX_BUF_FRAME_TYPE 0x31
143 #define TCPC_RX_BUF_FRAME_TYPE_SOP 0
144 #define TCPC_RX_HDR 0x32
145 #define TCPC_RX_DATA 0x34 /* through 0x4f */
146
147 #define TCPC_TRANSMIT 0x50
148 #define TCPC_TRANSMIT_RETRY_SHIFT 4
149 #define TCPC_TRANSMIT_RETRY_MASK 0x3
150 #define TCPC_TRANSMIT_TYPE_SHIFT 0
151 #define TCPC_TRANSMIT_TYPE_MASK 0x7
152
153 #define TCPC_TX_BYTE_CNT 0x51
154 #define TCPC_TX_HDR 0x52
155 #define TCPC_TX_DATA 0x54 /* through 0x6f */
156
157 #define TCPC_VBUS_VOLTAGE 0x70
158 #define TCPC_VBUS_VOLTAGE_MASK 0x3ff
159 #define TCPC_VBUS_VOLTAGE_LSB_MV 25
160 #define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
161 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV 25
162 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX 0x3ff
163 #define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74
164 #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
165 #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
166
167 /* I2C_WRITE_BYTE_COUNT + 1 when TX_BUF_BYTE_x is only accessible I2C_WRITE_BYTE_COUNT */
168 #define TCPC_TRANSMIT_BUFFER_MAX_LEN 31
169
170 #define tcpc_presenting_rd(reg, cc) \
171 (!(TCPC_ROLE_CTRL_DRP & (reg)) && \
172 (((reg) & (TCPC_ROLE_CTRL_## cc ##_MASK << TCPC_ROLE_CTRL_## cc ##_SHIFT)) == \
173 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_## cc ##_SHIFT)))
174
175 struct tcpci;
176
177 /*
178 * @TX_BUF_BYTE_x_hidden:
179 * optional; Set when TX_BUF_BYTE_x can only be accessed through I2C_WRITE_BYTE_COUNT.
180 * @frs_sourcing_vbus:
181 * Optional; Callback to perform chip specific operations when FRS
182 * is sourcing vbus.
183 * @auto_discharge_disconnect:
184 * Optional; Enables TCPC to autonously discharge vbus on disconnect.
185 * @vbus_vsafe0v:
186 * optional; Set when TCPC can detect whether vbus is at VSAFE0V.
187 * @set_partner_usb_comm_capable:
188 * Optional; The USB Communications Capable bit indicates if port
189 * partner is capable of communication over the USB data lines
190 * (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit.
191 * @check_contaminant:
192 * Optional; The callback is invoked when chiplevel drivers indicated
193 * that the USB port needs to be checked for contaminant presence.
194 * Chip level drivers are expected to check for contaminant and call
195 * tcpm_clean_port when the port is clean to put the port back into
196 * toggling state.
197 */
198 struct tcpci_data {
199 struct regmap *regmap;
200 unsigned char TX_BUF_BYTE_x_hidden:1;
201 unsigned char auto_discharge_disconnect:1;
202 unsigned char vbus_vsafe0v:1;
203
204 int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
205 int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
206 bool enable);
207 int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
208 enum typec_cc_status cc);
209 int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool source, bool sink);
210 void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data);
211 void (*set_partner_usb_comm_capable)(struct tcpci *tcpci, struct tcpci_data *data,
212 bool capable);
213 void (*check_contaminant)(struct tcpci *tcpci, struct tcpci_data *data);
214 };
215
216 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data);
217 void tcpci_unregister_port(struct tcpci *tcpci);
218 irqreturn_t tcpci_irq(struct tcpci *tcpci);
219
220 struct tcpm_port;
221 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci);
222
tcpci_to_typec_cc(unsigned int cc,bool sink)223 static inline enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
224 {
225 switch (cc) {
226 case 0x1:
227 return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
228 case 0x2:
229 return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
230 case 0x3:
231 if (sink)
232 return TYPEC_CC_RP_3_0;
233 fallthrough;
234 case 0x0:
235 default:
236 return TYPEC_CC_OPEN;
237 }
238 }
239 #endif /* __LINUX_USB_TCPCI_H */
240