Home
last modified time | relevance | path

Searched refs:TEGRA20_CLK_PLL_P_OUT3 (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dtegra20-car.h147 #define TEGRA20_CLK_PLL_P_OUT3 124 macro
/linux-6.3-rc2/drivers/clk/tegra/
A Dclk-tegra20.c426 { .con_id = "pll_p_out3", .dt_id = TEGRA20_CLK_PLL_P_OUT3 },
548 [tegra_clk_pll_p_out3] = { .dt_id = TEGRA20_CLK_PLL_P_OUT3, .present = true },
1017 { TEGRA20_CLK_PLL_P_OUT3, TEGRA20_CLK_CLK_MAX, 72000000, 1 },
/linux-6.3-rc2/arch/arm/boot/dts/
A Dtegra20.dtsi552 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
582 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
598 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
614 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
A Dtegra20-paz00.dts320 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;

Completed in 9 milliseconds