Searched refs:TEGRA234_CLK_PLLC4 (Results 1 – 2 of 2) sorted by relevance
451 #define TEGRA234_CLK_PLLC4 237U macro
945 <&bpmp TEGRA234_CLK_PLLC4>;946 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC4>;
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