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Searched refs:TRCVMIDCCTLR0 (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/hwtracing/coresight/
A Dcoresight-etm4x-cfg.c73 CHECKREG(TRCVMIDCCTLR0, vmid_mask0); in etm4_cfg_map_reg_offset()
A Dcoresight-etm4x.h101 #define TRCVMIDCCTLR0 0x688 macro
459 CASE_##op((val), TRCVMIDCCTLR0) \
A Dcoresight-etm4x-core.c487 etm4x_relaxed_write32(csa, config->vmid_mask0, TRCVMIDCCTLR0); in etm4_enable_hw()
1735 state->trcvmidcctlr0 = etm4x_read32(csa, TRCVMIDCCTLR0); in __etm4_cpu_save()
1859 etm4x_relaxed_write32(csa, state->trcvmidcctlr0, TRCVMIDCCTLR0); in __etm4_cpu_restore()

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