Searched refs:UVD_CGC_CTRL (Results 1 – 8 of 8) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | uvd_v5_0.c | 688 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v5_0_set_sw_clock_gating()
689 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v5_0_set_sw_clock_gating()
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| A D | uvd_v6_0.c | 1345 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) | in uvd_v6_0_set_sw_clock_gating()
1346 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY)); in uvd_v6_0_set_sw_clock_gating()
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| A D | uvd_v7_0.c | 1627 (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) |
1628 (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY));
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| A D | sid.h | 1630 #define UVD_CGC_CTRL 0x3dc2 macro
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | si.c | 5171 tmp = RREG32(UVD_CGC_CTRL); in si_set_uvd_dcm()
5183 WREG32(UVD_CGC_CTRL, tmp); in si_set_uvd_dcm()
5194 u32 tmp = RREG32(UVD_CGC_CTRL); in si_init_uvd_internal_cg()
5196 WREG32(UVD_CGC_CTRL, tmp); in si_init_uvd_internal_cg()
5456 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg()
5459 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg()
5468 orig = data = RREG32(UVD_CGC_CTRL); in si_enable_uvd_mgcg()
5471 WREG32(UVD_CGC_CTRL, data); in si_enable_uvd_mgcg()
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| A D | sid.h | 1568 #define UVD_CGC_CTRL 0xF4B0 macro
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| A D | cikd.h | 2085 #define UVD_CGC_CTRL 0xF4B0 macro
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| A D | cik.c | 6212 orig = data = RREG32(UVD_CGC_CTRL); in cik_enable_uvd_mgcg()
6215 WREG32(UVD_CGC_CTRL, data); in cik_enable_uvd_mgcg()
6221 orig = data = RREG32(UVD_CGC_CTRL); in cik_enable_uvd_mgcg()
6224 WREG32(UVD_CGC_CTRL, data); in cik_enable_uvd_mgcg()
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