Searched refs:VECS0 (Results 1 – 16 of 16) sorted by relevance
/linux-6.3-rc2/drivers/gpu/drm/i915/ |
A D | i915_pci.c | 624 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 689 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1) 772 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 793 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 850 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 901 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 914 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0), 933 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | 946 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 1053 BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) | [all …]
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A D | i915_drv.h | 757 ENGINE_INSTANCES_MASK(gt, VECS0, I915_MAX_VECS)
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A D | i915_gpu_error.c | 1295 case VECS0: in engine_record_registers()
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/linux-6.3-rc2/drivers/gpu/drm/i915/gvt/ |
A D | mmio_context.c | 135 {VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */ 163 [VECS0] = 0xcb00, 350 [VECS0] = 0x4270, 407 [VECS0] = 0xcb00, in switch_mocs()
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A D | execlist.c | 53 [VECS0] = VECS_AS_CONTEXT_SWITCH,
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A D | cmd_parser.c | 430 #define R_VECS BIT(VECS0) 630 [VECS0] = { 1172 [VECS0] = {
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A D | handlers.c | 333 engine_mask |= BIT(VECS0); in gdrst_mmio_write() 2088 id = VECS0; in gvt_reg_tlb_control_handler()
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/linux-6.3-rc2/drivers/gpu/drm/i915/gt/ |
A D | intel_engine_types.h | 129 VECS0, enumerator 133 #define _VECS(n) (VECS0 + (n))
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A D | intel_engine_user.c | 167 [VIDEO_ENHANCEMENT_CLASS] = { VECS0, I915_MAX_VECS }, in legacy_ring_idx()
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A D | intel_engine_cs.c | 192 [VECS0] = { 420 [VECS0] = GEN11_GRDOM_VECS, in get_reset_domain() 439 [VECS0] = GEN6_GRDOM_VECS, in get_reset_domain() 1576 [VECS0] = MSG_IDLE_VECS0, in __cs_pending_mi_force_wakes()
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A D | intel_mocs.c | 572 [VECS0] = __GEN9_VECS0_MOCS0, in mocs_offset()
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A D | intel_gt_irq.c | 530 if (HAS_ENGINE(gt, VECS0)) { in gen5_gt_irq_postinstall()
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A D | intel_ring_submission.c | 102 case VECS0: in set_hwsp()
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A D | intel_rps.c | 1955 intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10); in gen6_rps_irq_handler()
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A D | intel_execlists_submission.c | 3500 [VECS0] = GEN8_VECS_IRQ_SHIFT, in logical_ring_default_irqs()
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/linux-6.3-rc2/drivers/gpu/drm/i915/gem/ |
A D | i915_gem_execbuffer.c | 2480 [I915_EXEC_VEBOX] = VECS0
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