1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * audio.h  --  Audio Driver for Wolfson WM8350 PMIC
4  *
5  * Copyright 2007, 2008 Wolfson Microelectronics PLC
6  */
7 
8 #ifndef __LINUX_MFD_WM8350_AUDIO_H_
9 #define __LINUX_MFD_WM8350_AUDIO_H_
10 
11 #include <linux/platform_device.h>
12 
13 #define WM8350_CLOCK_CONTROL_1                  0x28
14 #define WM8350_CLOCK_CONTROL_2                  0x29
15 #define WM8350_FLL_CONTROL_1                    0x2A
16 #define WM8350_FLL_CONTROL_2                    0x2B
17 #define WM8350_FLL_CONTROL_3                    0x2C
18 #define WM8350_FLL_CONTROL_4                    0x2D
19 #define WM8350_DAC_CONTROL                      0x30
20 #define WM8350_DAC_DIGITAL_VOLUME_L             0x32
21 #define WM8350_DAC_DIGITAL_VOLUME_R             0x33
22 #define WM8350_DAC_LR_RATE                      0x35
23 #define WM8350_DAC_CLOCK_CONTROL                0x36
24 #define WM8350_DAC_MUTE                         0x3A
25 #define WM8350_DAC_MUTE_VOLUME                  0x3B
26 #define WM8350_DAC_SIDE                         0x3C
27 #define WM8350_ADC_CONTROL                      0x40
28 #define WM8350_ADC_DIGITAL_VOLUME_L             0x42
29 #define WM8350_ADC_DIGITAL_VOLUME_R             0x43
30 #define WM8350_ADC_DIVIDER                      0x44
31 #define WM8350_ADC_LR_RATE                      0x46
32 #define WM8350_INPUT_CONTROL                    0x48
33 #define WM8350_IN3_INPUT_CONTROL                0x49
34 #define WM8350_MIC_BIAS_CONTROL                 0x4A
35 #define WM8350_OUTPUT_CONTROL                   0x4C
36 #define WM8350_JACK_DETECT                      0x4D
37 #define WM8350_ANTI_POP_CONTROL                 0x4E
38 #define WM8350_LEFT_INPUT_VOLUME                0x50
39 #define WM8350_RIGHT_INPUT_VOLUME               0x51
40 #define WM8350_LEFT_MIXER_CONTROL               0x58
41 #define WM8350_RIGHT_MIXER_CONTROL              0x59
42 #define WM8350_OUT3_MIXER_CONTROL               0x5C
43 #define WM8350_OUT4_MIXER_CONTROL               0x5D
44 #define WM8350_OUTPUT_LEFT_MIXER_VOLUME         0x60
45 #define WM8350_OUTPUT_RIGHT_MIXER_VOLUME        0x61
46 #define WM8350_INPUT_MIXER_VOLUME_L             0x62
47 #define WM8350_INPUT_MIXER_VOLUME_R             0x63
48 #define WM8350_INPUT_MIXER_VOLUME               0x64
49 #define WM8350_LOUT1_VOLUME                     0x68
50 #define WM8350_ROUT1_VOLUME                     0x69
51 #define WM8350_LOUT2_VOLUME                     0x6A
52 #define WM8350_ROUT2_VOLUME                     0x6B
53 #define WM8350_BEEP_VOLUME                      0x6F
54 #define WM8350_AI_FORMATING                     0x70
55 #define WM8350_ADC_DAC_COMP                     0x71
56 #define WM8350_AI_ADC_CONTROL                   0x72
57 #define WM8350_AI_DAC_CONTROL                   0x73
58 #define WM8350_AIF_TEST                         0x74
59 #define WM8350_JACK_PIN_STATUS                  0xE7
60 
61 /* Bit values for R08 (0x08) */
62 #define WM8350_CODEC_ISEL_1_5                   0	/* x1.5 */
63 #define WM8350_CODEC_ISEL_1_0                   1	/* x1.0 */
64 #define WM8350_CODEC_ISEL_0_75                  2	/* x0.75 */
65 #define WM8350_CODEC_ISEL_0_5                   3	/* x0.5 */
66 
67 #define WM8350_VMID_OFF                         0
68 #define WM8350_VMID_300K                        1
69 #define WM8350_VMID_50K                         2
70 #define WM8350_VMID_5K                          3
71 
72 /*
73  * R40 (0x28) - Clock Control 1
74  */
75 #define WM8350_TOCLK_RATE                       0x4000
76 #define WM8350_MCLK_SEL                         0x0800
77 #define WM8350_MCLK_DIV_MASK                    0x0100
78 #define WM8350_BCLK_DIV_MASK                    0x00F0
79 #define WM8350_OPCLK_DIV_MASK                   0x0007
80 
81 /*
82  * R41 (0x29) - Clock Control 2
83  */
84 #define WM8350_LRC_ADC_SEL                      0x8000
85 #define WM8350_MCLK_DIR                         0x0001
86 
87 /*
88  * R42 (0x2A) - FLL Control 1
89  */
90 #define WM8350_FLL_DITHER_WIDTH_MASK            0x3000
91 #define WM8350_FLL_DITHER_HP                    0x0800
92 #define WM8350_FLL_OUTDIV_MASK                  0x0700
93 #define WM8350_FLL_RSP_RATE_MASK                0x00F0
94 #define WM8350_FLL_RATE_MASK                    0x0007
95 
96 /*
97  * R43 (0x2B) - FLL Control 2
98  */
99 #define WM8350_FLL_RATIO_MASK                   0xF800
100 #define WM8350_FLL_N_MASK                       0x03FF
101 
102 /*
103  * R44 (0x2C) - FLL Control 3
104  */
105 #define WM8350_FLL_K_MASK                       0xFFFF
106 
107 /*
108  * R45 (0x2D) - FLL Control 4
109  */
110 #define WM8350_FLL_FRAC                         0x0020
111 #define WM8350_FLL_SLOW_LOCK_REF                0x0010
112 #define WM8350_FLL_CLK_SRC_MASK                 0x0003
113 
114 /*
115  * R48 (0x30) - DAC Control
116  */
117 #define WM8350_DAC_MONO                         0x2000
118 #define WM8350_AIF_LRCLKRATE                    0x1000
119 #define WM8350_DEEMP_MASK                       0x0030
120 #define WM8350_DACL_DATINV                      0x0002
121 #define WM8350_DACR_DATINV                      0x0001
122 
123 /*
124  * R50 (0x32) - DAC Digital Volume L
125  */
126 #define WM8350_DAC_VU                           0x0100
127 #define WM8350_DACL_VOL_MASK                    0x00FF
128 
129 /*
130  * R51 (0x33) - DAC Digital Volume R
131  */
132 #define WM8350_DAC_VU                           0x0100
133 #define WM8350_DACR_VOL_MASK                    0x00FF
134 
135 /*
136  * R53 (0x35) - DAC LR Rate
137  */
138 #define WM8350_DACLRC_ENA                       0x0800
139 #define WM8350_DACLRC_RATE_MASK                 0x07FF
140 
141 /*
142  * R54 (0x36) - DAC Clock Control
143  */
144 #define WM8350_DACCLK_POL                       0x0010
145 #define WM8350_DAC_CLKDIV_MASK                  0x0007
146 
147 /*
148  * R58 (0x3A) - DAC Mute
149  */
150 #define WM8350_DAC_MUTE_ENA                     0x4000
151 
152 /*
153  * R59 (0x3B) - DAC Mute Volume
154  */
155 #define WM8350_DAC_MUTEMODE                     0x4000
156 #define WM8350_DAC_MUTERATE                     0x2000
157 #define WM8350_DAC_SB_FILT                      0x1000
158 
159 /*
160  * R60 (0x3C) - DAC Side
161  */
162 #define WM8350_ADC_TO_DACL_MASK                 0x3000
163 #define WM8350_ADC_TO_DACR_MASK                 0x0C00
164 
165 /*
166  * R64 (0x40) - ADC Control
167  */
168 #define WM8350_ADC_HPF_CUT_MASK                 0x0300
169 #define WM8350_ADCL_DATINV                      0x0002
170 #define WM8350_ADCR_DATINV                      0x0001
171 
172 /*
173  * R66 (0x42) - ADC Digital Volume L
174  */
175 #define WM8350_ADC_VU                           0x0100
176 #define WM8350_ADCL_VOL_MASK                    0x00FF
177 
178 /*
179  * R67 (0x43) - ADC Digital Volume R
180  */
181 #define WM8350_ADC_VU                           0x0100
182 #define WM8350_ADCR_VOL_MASK                    0x00FF
183 
184 /*
185  * R68 (0x44) - ADC Divider
186  */
187 #define WM8350_ADCL_DAC_SVOL_MASK               0x0F00
188 #define WM8350_ADCR_DAC_SVOL_MASK               0x00F0
189 #define WM8350_ADCCLK_POL                       0x0008
190 #define WM8350_ADC_CLKDIV_MASK                  0x0007
191 
192 /*
193  * R70 (0x46) - ADC LR Rate
194  */
195 #define WM8350_ADCLRC_ENA                       0x0800
196 #define WM8350_ADCLRC_RATE_MASK                 0x07FF
197 
198 /*
199  * R72 (0x48) - Input Control
200  */
201 #define WM8350_IN2R_ENA                         0x0400
202 #define WM8350_IN1RN_ENA                        0x0200
203 #define WM8350_IN1RP_ENA                        0x0100
204 #define WM8350_IN2L_ENA                         0x0004
205 #define WM8350_IN1LN_ENA                        0x0002
206 #define WM8350_IN1LP_ENA                        0x0001
207 
208 /*
209  * R73 (0x49) - IN3 Input Control
210  */
211 #define WM8350_IN3R_SHORT                       0x4000
212 #define WM8350_IN3L_SHORT                       0x0040
213 
214 /*
215  * R74 (0x4A) - Mic Bias Control
216  */
217 #define WM8350_MICBSEL                          0x4000
218 #define WM8350_MCDTHR_MASK                      0x001C
219 #define WM8350_MCDSCTHR_MASK                    0x0003
220 
221 /*
222  * R76 (0x4C) - Output Control
223  */
224 #define WM8350_OUT4_VROI                        0x0800
225 #define WM8350_OUT3_VROI                        0x0400
226 #define WM8350_OUT2_VROI                        0x0200
227 #define WM8350_OUT1_VROI                        0x0100
228 #define WM8350_OUT2_FB                          0x0004
229 #define WM8350_OUT1_FB                          0x0001
230 
231 /*
232  * R77 (0x4D) - Jack Detect
233  */
234 #define WM8350_JDL_ENA                          0x8000
235 #define WM8350_JDR_ENA                          0x4000
236 
237 /*
238  * R78 (0x4E) - Anti Pop Control
239  */
240 #define WM8350_ANTI_POP_MASK                    0x0300
241 #define WM8350_DIS_OP_LN4_MASK                  0x00C0
242 #define WM8350_DIS_OP_LN3_MASK                  0x0030
243 #define WM8350_DIS_OP_OUT2_MASK                 0x000C
244 #define WM8350_DIS_OP_OUT1_MASK                 0x0003
245 
246 /*
247  * R80 (0x50) - Left Input Volume
248  */
249 #define WM8350_INL_MUTE                         0x4000
250 #define WM8350_INL_ZC                           0x2000
251 #define WM8350_IN_VU                            0x0100
252 #define WM8350_INL_VOL_MASK                     0x00FC
253 
254 /*
255  * R81 (0x51) - Right Input Volume
256  */
257 #define WM8350_INR_MUTE                         0x4000
258 #define WM8350_INR_ZC                           0x2000
259 #define WM8350_IN_VU                            0x0100
260 #define WM8350_INR_VOL_MASK                     0x00FC
261 
262 /*
263  * R88 (0x58) - Left Mixer Control
264  */
265 #define WM8350_DACR_TO_MIXOUTL                  0x1000
266 #define WM8350_DACL_TO_MIXOUTL                  0x0800
267 #define WM8350_IN3L_TO_MIXOUTL                  0x0004
268 #define WM8350_INR_TO_MIXOUTL                   0x0002
269 #define WM8350_INL_TO_MIXOUTL                   0x0001
270 
271 /*
272  * R89 (0x59) - Right Mixer Control
273  */
274 #define WM8350_DACR_TO_MIXOUTR                  0x1000
275 #define WM8350_DACL_TO_MIXOUTR                  0x0800
276 #define WM8350_IN3R_TO_MIXOUTR                  0x0008
277 #define WM8350_INR_TO_MIXOUTR                   0x0002
278 #define WM8350_INL_TO_MIXOUTR                   0x0001
279 
280 /*
281  * R92 (0x5C) - OUT3 Mixer Control
282  */
283 #define WM8350_DACL_TO_OUT3                     0x0800
284 #define WM8350_MIXINL_TO_OUT3                   0x0100
285 #define WM8350_OUT4_TO_OUT3                     0x0008
286 #define WM8350_MIXOUTL_TO_OUT3                  0x0001
287 
288 /*
289  * R93 (0x5D) - OUT4 Mixer Control
290  */
291 #define WM8350_DACR_TO_OUT4                     0x1000
292 #define WM8350_DACL_TO_OUT4                     0x0800
293 #define WM8350_OUT4_ATTN                        0x0400
294 #define WM8350_MIXINR_TO_OUT4                   0x0200
295 #define WM8350_OUT3_TO_OUT4                     0x0004
296 #define WM8350_MIXOUTR_TO_OUT4                  0x0002
297 #define WM8350_MIXOUTL_TO_OUT4                  0x0001
298 
299 /*
300  * R96 (0x60) - Output Left Mixer Volume
301  */
302 #define WM8350_IN3L_MIXOUTL_VOL_MASK            0x0E00
303 #define WM8350_IN3L_MIXOUTL_VOL_SHIFT                9
304 #define WM8350_INR_MIXOUTL_VOL_MASK             0x00E0
305 #define WM8350_INR_MIXOUTL_VOL_SHIFT                 5
306 #define WM8350_INL_MIXOUTL_VOL_MASK             0x000E
307 #define WM8350_INL_MIXOUTL_VOL_SHIFT                 1
308 
309 /* Bit values for R96 (0x60) */
310 #define WM8350_IN3L_MIXOUTL_VOL_OFF                  0
311 #define WM8350_IN3L_MIXOUTL_VOL_M12DB                1
312 #define WM8350_IN3L_MIXOUTL_VOL_M9DB                 2
313 #define WM8350_IN3L_MIXOUTL_VOL_M6DB                 3
314 #define WM8350_IN3L_MIXOUTL_VOL_M3DB                 4
315 #define WM8350_IN3L_MIXOUTL_VOL_0DB                  5
316 #define WM8350_IN3L_MIXOUTL_VOL_3DB                  6
317 #define WM8350_IN3L_MIXOUTL_VOL_6DB                  7
318 
319 #define WM8350_INR_MIXOUTL_VOL_OFF                   0
320 #define WM8350_INR_MIXOUTL_VOL_M12DB                 1
321 #define WM8350_INR_MIXOUTL_VOL_M9DB                  2
322 #define WM8350_INR_MIXOUTL_VOL_M6DB                  3
323 #define WM8350_INR_MIXOUTL_VOL_M3DB                  4
324 #define WM8350_INR_MIXOUTL_VOL_0DB                   5
325 #define WM8350_INR_MIXOUTL_VOL_3DB                   6
326 #define WM8350_INR_MIXOUTL_VOL_6DB                   7
327 
328 #define WM8350_INL_MIXOUTL_VOL_OFF                   0
329 #define WM8350_INL_MIXOUTL_VOL_M12DB                 1
330 #define WM8350_INL_MIXOUTL_VOL_M9DB                  2
331 #define WM8350_INL_MIXOUTL_VOL_M6DB                  3
332 #define WM8350_INL_MIXOUTL_VOL_M3DB                  4
333 #define WM8350_INL_MIXOUTL_VOL_0DB                   5
334 #define WM8350_INL_MIXOUTL_VOL_3DB                   6
335 #define WM8350_INL_MIXOUTL_VOL_6DB                   7
336 
337 /*
338  * R97 (0x61) - Output Right Mixer Volume
339  */
340 #define WM8350_IN3R_MIXOUTR_VOL_MASK            0xE000
341 #define WM8350_IN3R_MIXOUTR_VOL_SHIFT               13
342 #define WM8350_INR_MIXOUTR_VOL_MASK             0x00E0
343 #define WM8350_INR_MIXOUTR_VOL_SHIFT                 5
344 #define WM8350_INL_MIXOUTR_VOL_MASK             0x000E
345 #define WM8350_INL_MIXOUTR_VOL_SHIFT                 1
346 
347 /* Bit values for R96 (0x60) */
348 #define WM8350_IN3R_MIXOUTR_VOL_OFF                  0
349 #define WM8350_IN3R_MIXOUTR_VOL_M12DB                1
350 #define WM8350_IN3R_MIXOUTR_VOL_M9DB                 2
351 #define WM8350_IN3R_MIXOUTR_VOL_M6DB                 3
352 #define WM8350_IN3R_MIXOUTR_VOL_M3DB                 4
353 #define WM8350_IN3R_MIXOUTR_VOL_0DB                  5
354 #define WM8350_IN3R_MIXOUTR_VOL_3DB                  6
355 #define WM8350_IN3R_MIXOUTR_VOL_6DB                  7
356 
357 #define WM8350_INR_MIXOUTR_VOL_OFF                   0
358 #define WM8350_INR_MIXOUTR_VOL_M12DB                 1
359 #define WM8350_INR_MIXOUTR_VOL_M9DB                  2
360 #define WM8350_INR_MIXOUTR_VOL_M6DB                  3
361 #define WM8350_INR_MIXOUTR_VOL_M3DB                  4
362 #define WM8350_INR_MIXOUTR_VOL_0DB                   5
363 #define WM8350_INR_MIXOUTR_VOL_3DB                   6
364 #define WM8350_INR_MIXOUTR_VOL_6DB                   7
365 
366 #define WM8350_INL_MIXOUTR_VOL_OFF                   0
367 #define WM8350_INL_MIXOUTR_VOL_M12DB                 1
368 #define WM8350_INL_MIXOUTR_VOL_M9DB                  2
369 #define WM8350_INL_MIXOUTR_VOL_M6DB                  3
370 #define WM8350_INL_MIXOUTR_VOL_M3DB                  4
371 #define WM8350_INL_MIXOUTR_VOL_0DB                   5
372 #define WM8350_INL_MIXOUTR_VOL_3DB                   6
373 #define WM8350_INL_MIXOUTR_VOL_6DB                   7
374 
375 /*
376  * R98 (0x62) - Input Mixer Volume L
377  */
378 #define WM8350_IN3L_MIXINL_VOL_MASK             0x0E00
379 #define WM8350_IN2L_MIXINL_VOL_MASK             0x000E
380 #define WM8350_INL_MIXINL_VOL                   0x0001
381 
382 /*
383  * R99 (0x63) - Input Mixer Volume R
384  */
385 #define WM8350_IN3R_MIXINR_VOL_MASK             0xE000
386 #define WM8350_IN2R_MIXINR_VOL_MASK             0x00E0
387 #define WM8350_INR_MIXINR_VOL                   0x0001
388 
389 /*
390  * R100 (0x64) - Input Mixer Volume
391  */
392 #define WM8350_OUT4_MIXIN_DST                   0x8000
393 #define WM8350_OUT4_MIXIN_VOL_MASK              0x000E
394 
395 /*
396  * R104 (0x68) - LOUT1 Volume
397  */
398 #define WM8350_OUT1L_MUTE                       0x4000
399 #define WM8350_OUT1L_ZC                         0x2000
400 #define WM8350_OUT1_VU                          0x0100
401 #define WM8350_OUT1L_VOL_MASK                   0x00FC
402 #define WM8350_OUT1L_VOL_SHIFT                       2
403 
404 /*
405  * R105 (0x69) - ROUT1 Volume
406  */
407 #define WM8350_OUT1R_MUTE                       0x4000
408 #define WM8350_OUT1R_ZC                         0x2000
409 #define WM8350_OUT1_VU                          0x0100
410 #define WM8350_OUT1R_VOL_MASK                   0x00FC
411 #define WM8350_OUT1R_VOL_SHIFT                       2
412 
413 /*
414  * R106 (0x6A) - LOUT2 Volume
415  */
416 #define WM8350_OUT2L_MUTE                       0x4000
417 #define WM8350_OUT2L_ZC                         0x2000
418 #define WM8350_OUT2_VU                          0x0100
419 #define WM8350_OUT2L_VOL_MASK                   0x00FC
420 
421 /*
422  * R107 (0x6B) - ROUT2 Volume
423  */
424 #define WM8350_OUT2R_MUTE                       0x4000
425 #define WM8350_OUT2R_ZC                         0x2000
426 #define WM8350_OUT2R_INV                        0x0400
427 #define WM8350_OUT2R_INV_MUTE                   0x0200
428 #define WM8350_OUT2_VU                          0x0100
429 #define WM8350_OUT2R_VOL_MASK                   0x00FC
430 
431 /*
432  * R111 (0x6F) - BEEP Volume
433  */
434 #define WM8350_IN3R_OUT2R_VOL_MASK              0x00E0
435 
436 /*
437  * R112 (0x70) - AI Formating
438  */
439 #define WM8350_AIF_BCLK_INV                     0x8000
440 #define WM8350_AIF_TRI                          0x2000
441 #define WM8350_AIF_LRCLK_INV                    0x1000
442 #define WM8350_AIF_WL_MASK                      0x0C00
443 #define WM8350_AIF_FMT_MASK                     0x0300
444 
445 /*
446  * R113 (0x71) - ADC DAC COMP
447  */
448 #define WM8350_DAC_COMP                         0x0080
449 #define WM8350_DAC_COMPMODE                     0x0040
450 #define WM8350_ADC_COMP                         0x0020
451 #define WM8350_ADC_COMPMODE                     0x0010
452 #define WM8350_LOOPBACK                         0x0001
453 
454 /*
455  * R114 (0x72) - AI ADC Control
456  */
457 #define WM8350_AIFADC_PD                        0x0080
458 #define WM8350_AIFADCL_SRC                      0x0040
459 #define WM8350_AIFADCR_SRC                      0x0020
460 #define WM8350_AIFADC_TDM_CHAN                  0x0010
461 #define WM8350_AIFADC_TDM                       0x0008
462 
463 /*
464  * R115 (0x73) - AI DAC Control
465  */
466 #define WM8350_BCLK_MSTR                        0x4000
467 #define WM8350_AIFDAC_PD                        0x0080
468 #define WM8350_DACL_SRC                         0x0040
469 #define WM8350_DACR_SRC                         0x0020
470 #define WM8350_AIFDAC_TDM_CHAN                  0x0010
471 #define WM8350_AIFDAC_TDM                       0x0008
472 #define WM8350_DAC_BOOST_MASK                   0x0003
473 
474 /*
475  * R116 (0x74) - AIF Test
476  */
477 #define WM8350_CODEC_BYP                        0x4000
478 #define WM8350_AIFADC_WR_TST                    0x2000
479 #define WM8350_AIFADC_RD_TST                    0x1000
480 #define WM8350_AIFDAC_WR_TST                    0x0800
481 #define WM8350_AIFDAC_RD_TST                    0x0400
482 #define WM8350_AIFADC_ASYN                      0x0020
483 #define WM8350_AIFDAC_ASYN                      0x0010
484 
485 /*
486  * R231 (0xE7) - Jack Status
487  */
488 #define WM8350_JACK_L_LVL			0x0800
489 #define WM8350_JACK_R_LVL                       0x0400
490 #define WM8350_JACK_MICSCD_LVL			0x0200
491 #define WM8350_JACK_MICSD_LVL			0x0100
492 
493 /*
494  * WM8350 Platform setup
495  */
496 #define WM8350_S_CURVE_NONE			0x0
497 #define WM8350_S_CURVE_FAST			0x1
498 #define WM8350_S_CURVE_MEDIUM			0x2
499 #define WM8350_S_CURVE_SLOW			0x3
500 
501 #define WM8350_DISCHARGE_OFF			0x0
502 #define WM8350_DISCHARGE_FAST			0x1
503 #define WM8350_DISCHARGE_MEDIUM			0x2
504 #define WM8350_DISCHARGE_SLOW			0x3
505 
506 #define WM8350_TIE_OFF_500R			0x0
507 #define WM8350_TIE_OFF_30K			0x1
508 
509 /*
510  * Clock sources & directions
511  */
512 #define WM8350_SYSCLK				0
513 
514 #define WM8350_MCLK_SEL_PLL_MCLK		0
515 #define WM8350_MCLK_SEL_PLL_DAC			1
516 #define WM8350_MCLK_SEL_PLL_ADC			2
517 #define WM8350_MCLK_SEL_PLL_32K			3
518 #define WM8350_MCLK_SEL_MCLK			5
519 
520 /* clock divider id's */
521 #define WM8350_ADC_CLKDIV			0
522 #define WM8350_DAC_CLKDIV			1
523 #define WM8350_BCLK_CLKDIV			2
524 #define WM8350_OPCLK_CLKDIV			3
525 #define WM8350_TO_CLKDIV			4
526 #define WM8350_SYS_CLKDIV			5
527 #define WM8350_DACLR_CLKDIV			6
528 #define WM8350_ADCLR_CLKDIV			7
529 
530 /* ADC clock dividers */
531 #define WM8350_ADCDIV_1				0x0
532 #define WM8350_ADCDIV_1_5			0x1
533 #define WM8350_ADCDIV_2				0x2
534 #define WM8350_ADCDIV_3				0x3
535 #define WM8350_ADCDIV_4				0x4
536 #define WM8350_ADCDIV_5_5			0x5
537 #define WM8350_ADCDIV_6				0x6
538 
539 /* ADC clock dividers */
540 #define WM8350_DACDIV_1				0x0
541 #define WM8350_DACDIV_1_5			0x1
542 #define WM8350_DACDIV_2				0x2
543 #define WM8350_DACDIV_3				0x3
544 #define WM8350_DACDIV_4				0x4
545 #define WM8350_DACDIV_5_5			0x5
546 #define WM8350_DACDIV_6				0x6
547 
548 /* BCLK clock dividers */
549 #define WM8350_BCLK_DIV_1			(0x0 << 4)
550 #define WM8350_BCLK_DIV_1_5			(0x1 << 4)
551 #define WM8350_BCLK_DIV_2			(0x2 << 4)
552 #define WM8350_BCLK_DIV_3			(0x3 << 4)
553 #define WM8350_BCLK_DIV_4			(0x4 << 4)
554 #define WM8350_BCLK_DIV_5_5			(0x5 << 4)
555 #define WM8350_BCLK_DIV_6			(0x6 << 4)
556 #define WM8350_BCLK_DIV_8			(0x7 << 4)
557 #define WM8350_BCLK_DIV_11			(0x8 << 4)
558 #define WM8350_BCLK_DIV_12			(0x9 << 4)
559 #define WM8350_BCLK_DIV_16			(0xa << 4)
560 #define WM8350_BCLK_DIV_22			(0xb << 4)
561 #define WM8350_BCLK_DIV_24			(0xc << 4)
562 #define WM8350_BCLK_DIV_32			(0xd << 4)
563 #define WM8350_BCLK_DIV_44			(0xe << 4)
564 #define WM8350_BCLK_DIV_48			(0xf << 4)
565 
566 /* Sys (MCLK) clock dividers */
567 #define WM8350_MCLK_DIV_1			(0x0 << 8)
568 #define WM8350_MCLK_DIV_2			(0x1 << 8)
569 
570 /* OP clock dividers */
571 #define WM8350_OPCLK_DIV_1			0x0
572 #define WM8350_OPCLK_DIV_2			0x1
573 #define WM8350_OPCLK_DIV_3			0x2
574 #define WM8350_OPCLK_DIV_4			0x3
575 #define WM8350_OPCLK_DIV_5_5			0x4
576 #define WM8350_OPCLK_DIV_6			0x5
577 
578 /* DAI ID */
579 #define WM8350_HIFI_DAI				0
580 
581 /*
582  * Audio interrupts.
583  */
584 #define WM8350_IRQ_CODEC_JCK_DET_L		39
585 #define WM8350_IRQ_CODEC_JCK_DET_R		40
586 #define WM8350_IRQ_CODEC_MICSCD			41
587 #define WM8350_IRQ_CODEC_MICD			42
588 
589 /*
590  * WM8350 Platform data.
591  *
592  * This must be initialised per platform for best audio performance.
593  * Please see WM8350 datasheet for information.
594  */
595 struct wm8350_audio_platform_data {
596 	int vmid_discharge_msecs;	/* VMID --> OFF discharge time */
597 	int drain_msecs;	/* OFF drain time */
598 	int cap_discharge_msecs;	/* Cap ON (from OFF) discharge time */
599 	int vmid_charge_msecs;	/* vmid power up time */
600 	u32 vmid_s_curve:2;	/* vmid enable s curve speed */
601 	u32 dis_out4:2;		/* out4 discharge speed */
602 	u32 dis_out3:2;		/* out3 discharge speed */
603 	u32 dis_out2:2;		/* out2 discharge speed */
604 	u32 dis_out1:2;		/* out1 discharge speed */
605 	u32 vroi_out4:1;	/* out4 tie off */
606 	u32 vroi_out3:1;	/* out3 tie off */
607 	u32 vroi_out2:1;	/* out2 tie off */
608 	u32 vroi_out1:1;	/* out1 tie off */
609 	u32 vroi_enable:1;	/* enable tie off */
610 	u32 codec_current_on:2;	/* current level ON */
611 	u32 codec_current_standby:2;	/* current level STANDBY */
612 	u32 codec_current_charge:2;	/* codec current @ vmid charge */
613 };
614 
615 struct wm8350_codec {
616 	struct platform_device *pdev;
617 	struct wm8350_audio_platform_data *platform_data;
618 };
619 
620 #endif
621