Searched refs:WREG32_FIELD15_PREREG (Results 1 – 6 of 6) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | gfxhub_v3_0_3.c | 185 WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2, in gfxhub_v3_0_3_init_system_aperture_regs()
393 WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v3_0_3_gart_disable()
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| A D | gfxhub_v3_0.c | 180 WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2, in gfxhub_v3_0_init_system_aperture_regs()
400 WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v3_0_gart_disable()
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| A D | soc15_common.h | 48 #define WREG32_FIELD15_PREREG(ip, idx, reg_name, field, val) \ macro
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| A D | nbio_v4_3.c | 154 WREG32_FIELD15_PREREG(NBIO, 0, RCC_DEV0_EPF0_RCC_DOORBELL_APER_EN, in nbio_v4_3_enable_doorbell_aperture()
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| A D | amdgpu_amdkfd_gfx_v11.c | 499 WREG32_FIELD15_PREREG(GC, 0, RLC_CP_SCHEDULERS, scheduler1, 0); in hqd_destroy_v11()
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| A D | gfx_v11_0.c | 1655 WREG32_FIELD15_PREREG(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff); in gfx_v11_0_constants_init()
1735 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v11_0_rlc_reset()
1737 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v11_0_rlc_reset()
1770 WREG32_FIELD15_PREREG(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v11_0_rlc_start()
3928 WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v11_0_kiq_init_register()
4022 WREG32_FIELD15_PREREG(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1); in gfx_v11_0_kiq_init_register()
5893 WREG32_FIELD15_PREREG(GC, 0, CP_INT_CNTL_RING0, CP_ECC_ERROR_INT_ENABLE, ecc_irq_state); in gfx_v11_0_set_cp_ecc_error_state()
5995 WREG32_FIELD15_PREREG(GC, 0, CP_INT_CNTL_RING0, in gfx_v11_0_set_priv_reg_fault_state()
6014 WREG32_FIELD15_PREREG(GC, 0, CP_INT_CNTL_RING0, in gfx_v11_0_set_priv_inst_fault_state()
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