Searched refs:WREG32_SMC_P (Results 1 – 4 of 4) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | si.c | 1871 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1888 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1904 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2, in si_set_vce_clocks()
1909 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_BYPASS_EN_MASK, in si_set_vce_clocks()
1914 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
1929 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_VCO_MODE_MASK, in si_set_vce_clocks()
1933 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
1950 WREG32_SMC_P(CG_VCEPLL_SPREAD_SPECTRUM, 0, ~SSEN_MASK); in si_set_vce_clocks()
1953 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_3, in si_set_vce_clocks()
1961 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2, in si_set_vce_clocks()
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| A D | amdgpu.h | 1196 #define WREG32_SMC_P(_Reg, _Val, _Mask) \ macro
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | si.c | 7476 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7492 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7508 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2, in si_set_vce_clocks()
7513 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_BYPASS_EN_MASK, in si_set_vce_clocks()
7518 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
7533 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_VCO_MODE_MASK, in si_set_vce_clocks()
7537 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
7539 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_SLEEP_MASK); in si_set_vce_clocks()
7554 WREG32_SMC_P(CG_VCEPLL_SPREAD_SPECTRUM, 0, ~SSEN_MASK); in si_set_vce_clocks()
7563 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2, in si_set_vce_clocks()
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| A D | radeon.h | 2591 #define WREG32_SMC_P(reg, val, mask) \ macro
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