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Searched refs:WR_ADDR_A7CFG (Results 1 – 1 of 1) sorted by relevance

/linux-6.3-rc2/drivers/net/phy/
A Drockchip.c40 #define WR_ADDR_A7CFG 0x18 macro
79 ret = phy_write(phydev, SMI_ADDR_TSTCNTL, TSTCNTL_WR | WR_ADDR_A7CFG); in rockchip_integrated_phy_analog_init()

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