Searched refs:XGMAC_RX_CONFIG (Results 1 – 3 of 3) sorted by relevance
22 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()46 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()53 u32 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()64 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()72 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()77 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()331 writel(cfg, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()507 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac_loopback()1023 writel(val, ioaddr + XGMAC_RX_CONFIG); in dwxgmac3_rxp_config()1373 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_arp_offload()[all …]
311 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()313 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()518 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()522 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()
31 #define XGMAC_RX_CONFIG 0x00000004 macro
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