Home
last modified time | relevance | path

Searched refs:_PORT (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/media/pci/intel/ipu3/
A Dcio2-bridge.h34 #define NODE_PORT(_PORT, _SENSOR_NODE) \ argument
36 .name = _PORT, \
40 #define NODE_ENDPOINT(_EP, _PORT, _PROPS) \ argument
43 .parent = _PORT, \
/linux-6.3-rc2/drivers/gpu/drm/i915/display/
A Dintel_display_reg_defs.h21 #define _PORT(port, a, b) _PICK_EVEN(port, a, b) macro
28 #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
A Dintel_dkl_phy_regs.h29 #define _DKL_REG_PHY_BASE(tc_port) _PORT(tc_port, \
A Dintel_mg_phy_regs.h12 _MMIO(_PORT(tc_port, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_reg.h263 #define VLV_PCS_DW0(ch) _PORT(ch, _VLV_PCS_DW0_CH0, _VLV_PCS_DW0_CH1)
279 #define VLV_PCS_DW1(ch) _PORT(ch, _VLV_PCS_DW1_CH0, _VLV_PCS_DW1_CH1)
292 #define VLV_PCS_DW8(ch) _PORT(ch, _VLV_PCS_DW8_CH0, _VLV_PCS_DW8_CH1)
309 #define VLV_PCS_DW9(ch) _PORT(ch, _VLV_PCS_DW9_CH0, _VLV_PCS_DW9_CH1)
381 #define VLV_TX_DW2(ch) _PORT(ch, _VLV_TX_DW2_CH0, _VLV_TX_DW2_CH1)
389 #define VLV_TX_DW3(ch) _PORT(ch, _VLV_TX_DW3_CH0, _VLV_TX_DW3_CH1)
397 #define VLV_TX_DW4(ch) _PORT(ch, _VLV_TX_DW4_CH0, _VLV_TX_DW4_CH1)
401 #define VLV_TX3_DW4(ch) _PORT(ch, _VLV_TX3_DW4_CH0, _VLV_TX3_DW4_CH1)
406 #define VLV_TX_DW5(ch) _PORT(ch, _VLV_TX_DW5_CH0, _VLV_TX_DW5_CH1)
410 #define VLV_TX_DW11(ch) _PORT(ch, _VLV_TX_DW11_CH0, _VLV_TX_DW11_CH1)
[all …]
/linux-6.3-rc2/drivers/pinctrl/renesas/
A Dpfc-r8a7740.c33 IRQ##irq##_PORT##pin##_MARK, \

Completed in 53 milliseconds