1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AD7887 SPI ADC driver
4 *
5 * Copyright 2010-2011 Analog Devices Inc.
6 */
7
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/sysfs.h>
12 #include <linux/spi/spi.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/err.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/bitops.h>
18
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/buffer.h>
22
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
25
26 #include <linux/platform_data/ad7887.h>
27
28 #define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
29 #define AD7887_DUAL BIT(4) /* dual-channel mode */
30 #define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
31 #define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
32 #define AD7887_PM_MODE1 0 /* CS based shutdown */
33 #define AD7887_PM_MODE2 1 /* full on */
34 #define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
35 #define AD7887_PM_MODE4 3 /* standby mode */
36
37 enum ad7887_channels {
38 AD7887_CH0,
39 AD7887_CH0_CH1,
40 AD7887_CH1,
41 };
42
43 /**
44 * struct ad7887_chip_info - chip specifc information
45 * @int_vref_mv: the internal reference voltage
46 * @channels: channels specification
47 * @num_channels: number of channels
48 * @dual_channels: channels specification in dual mode
49 * @num_dual_channels: number of channels in dual mode
50 */
51 struct ad7887_chip_info {
52 u16 int_vref_mv;
53 const struct iio_chan_spec *channels;
54 unsigned int num_channels;
55 const struct iio_chan_spec *dual_channels;
56 unsigned int num_dual_channels;
57 };
58
59 struct ad7887_state {
60 struct spi_device *spi;
61 const struct ad7887_chip_info *chip_info;
62 struct regulator *reg;
63 struct spi_transfer xfer[4];
64 struct spi_message msg[3];
65 struct spi_message *ring_msg;
66 unsigned char tx_cmd_buf[4];
67
68 /*
69 * DMA (thus cache coherency maintenance) may require the
70 * transfer buffers to live in their own cache lines.
71 * Buffer needs to be large enough to hold two 16 bit samples and a
72 * 64 bit aligned 64 bit timestamp.
73 */
74 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
75 };
76
77 enum ad7887_supported_device_ids {
78 ID_AD7887
79 };
80
ad7887_ring_preenable(struct iio_dev * indio_dev)81 static int ad7887_ring_preenable(struct iio_dev *indio_dev)
82 {
83 struct ad7887_state *st = iio_priv(indio_dev);
84
85 /* We know this is a single long so can 'cheat' */
86 switch (*indio_dev->active_scan_mask) {
87 case (1 << 0):
88 st->ring_msg = &st->msg[AD7887_CH0];
89 break;
90 case (1 << 1):
91 st->ring_msg = &st->msg[AD7887_CH1];
92 /* Dummy read: push CH1 setting down to hardware */
93 spi_sync(st->spi, st->ring_msg);
94 break;
95 case ((1 << 1) | (1 << 0)):
96 st->ring_msg = &st->msg[AD7887_CH0_CH1];
97 break;
98 }
99
100 return 0;
101 }
102
ad7887_ring_postdisable(struct iio_dev * indio_dev)103 static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
104 {
105 struct ad7887_state *st = iio_priv(indio_dev);
106
107 /* dummy read: restore default CH0 settin */
108 return spi_sync(st->spi, &st->msg[AD7887_CH0]);
109 }
110
ad7887_trigger_handler(int irq,void * p)111 static irqreturn_t ad7887_trigger_handler(int irq, void *p)
112 {
113 struct iio_poll_func *pf = p;
114 struct iio_dev *indio_dev = pf->indio_dev;
115 struct ad7887_state *st = iio_priv(indio_dev);
116 int b_sent;
117
118 b_sent = spi_sync(st->spi, st->ring_msg);
119 if (b_sent)
120 goto done;
121
122 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
123 iio_get_time_ns(indio_dev));
124 done:
125 iio_trigger_notify_done(indio_dev->trig);
126
127 return IRQ_HANDLED;
128 }
129
130 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
131 .preenable = &ad7887_ring_preenable,
132 .postdisable = &ad7887_ring_postdisable,
133 };
134
ad7887_scan_direct(struct ad7887_state * st,unsigned ch)135 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
136 {
137 int ret = spi_sync(st->spi, &st->msg[ch]);
138 if (ret)
139 return ret;
140
141 return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
142 }
143
ad7887_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)144 static int ad7887_read_raw(struct iio_dev *indio_dev,
145 struct iio_chan_spec const *chan,
146 int *val,
147 int *val2,
148 long m)
149 {
150 int ret;
151 struct ad7887_state *st = iio_priv(indio_dev);
152
153 switch (m) {
154 case IIO_CHAN_INFO_RAW:
155 ret = iio_device_claim_direct_mode(indio_dev);
156 if (ret)
157 return ret;
158 ret = ad7887_scan_direct(st, chan->address);
159 iio_device_release_direct_mode(indio_dev);
160
161 if (ret < 0)
162 return ret;
163 *val = ret >> chan->scan_type.shift;
164 *val &= GENMASK(chan->scan_type.realbits - 1, 0);
165 return IIO_VAL_INT;
166 case IIO_CHAN_INFO_SCALE:
167 if (st->reg) {
168 *val = regulator_get_voltage(st->reg);
169 if (*val < 0)
170 return *val;
171 *val /= 1000;
172 } else {
173 *val = st->chip_info->int_vref_mv;
174 }
175
176 *val2 = chan->scan_type.realbits;
177
178 return IIO_VAL_FRACTIONAL_LOG2;
179 }
180 return -EINVAL;
181 }
182
183 #define AD7887_CHANNEL(x) { \
184 .type = IIO_VOLTAGE, \
185 .indexed = 1, \
186 .channel = (x), \
187 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
188 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
189 .address = (x), \
190 .scan_index = (x), \
191 .scan_type = { \
192 .sign = 'u', \
193 .realbits = 12, \
194 .storagebits = 16, \
195 .shift = 0, \
196 .endianness = IIO_BE, \
197 }, \
198 }
199
200 static const struct iio_chan_spec ad7887_channels[] = {
201 AD7887_CHANNEL(0),
202 IIO_CHAN_SOFT_TIMESTAMP(1),
203 };
204
205 static const struct iio_chan_spec ad7887_dual_channels[] = {
206 AD7887_CHANNEL(0),
207 AD7887_CHANNEL(1),
208 IIO_CHAN_SOFT_TIMESTAMP(2),
209 };
210
211 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
212 /*
213 * More devices added in future
214 */
215 [ID_AD7887] = {
216 .channels = ad7887_channels,
217 .num_channels = ARRAY_SIZE(ad7887_channels),
218 .dual_channels = ad7887_dual_channels,
219 .num_dual_channels = ARRAY_SIZE(ad7887_dual_channels),
220 .int_vref_mv = 2500,
221 },
222 };
223
224 static const struct iio_info ad7887_info = {
225 .read_raw = &ad7887_read_raw,
226 };
227
ad7887_reg_disable(void * data)228 static void ad7887_reg_disable(void *data)
229 {
230 struct regulator *reg = data;
231
232 regulator_disable(reg);
233 }
234
ad7887_probe(struct spi_device * spi)235 static int ad7887_probe(struct spi_device *spi)
236 {
237 struct ad7887_platform_data *pdata = spi->dev.platform_data;
238 struct ad7887_state *st;
239 struct iio_dev *indio_dev;
240 uint8_t mode;
241 int ret;
242
243 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
244 if (indio_dev == NULL)
245 return -ENOMEM;
246
247 st = iio_priv(indio_dev);
248
249 st->reg = devm_regulator_get_optional(&spi->dev, "vref");
250 if (IS_ERR(st->reg)) {
251 if (PTR_ERR(st->reg) != -ENODEV)
252 return PTR_ERR(st->reg);
253
254 st->reg = NULL;
255 }
256
257 if (st->reg) {
258 ret = regulator_enable(st->reg);
259 if (ret)
260 return ret;
261
262 ret = devm_add_action_or_reset(&spi->dev, ad7887_reg_disable, st->reg);
263 if (ret)
264 return ret;
265 }
266
267 st->chip_info =
268 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
269
270 st->spi = spi;
271
272 indio_dev->name = spi_get_device_id(spi)->name;
273 indio_dev->info = &ad7887_info;
274 indio_dev->modes = INDIO_DIRECT_MODE;
275
276 /* Setup default message */
277
278 mode = AD7887_PM_MODE4;
279 if (!st->reg)
280 mode |= AD7887_REF_DIS;
281 if (pdata && pdata->en_dual)
282 mode |= AD7887_DUAL;
283
284 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
285
286 st->xfer[0].rx_buf = &st->data[0];
287 st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
288 st->xfer[0].len = 2;
289
290 spi_message_init(&st->msg[AD7887_CH0]);
291 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
292
293 if (pdata && pdata->en_dual) {
294 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
295
296 st->xfer[1].rx_buf = &st->data[0];
297 st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
298 st->xfer[1].len = 2;
299
300 st->xfer[2].rx_buf = &st->data[2];
301 st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
302 st->xfer[2].len = 2;
303
304 spi_message_init(&st->msg[AD7887_CH0_CH1]);
305 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
306 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
307
308 st->xfer[3].rx_buf = &st->data[2];
309 st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
310 st->xfer[3].len = 2;
311
312 spi_message_init(&st->msg[AD7887_CH1]);
313 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
314
315 indio_dev->channels = st->chip_info->dual_channels;
316 indio_dev->num_channels = st->chip_info->num_dual_channels;
317 } else {
318 indio_dev->channels = st->chip_info->channels;
319 indio_dev->num_channels = st->chip_info->num_channels;
320 }
321
322 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
323 &iio_pollfunc_store_time,
324 &ad7887_trigger_handler, &ad7887_ring_setup_ops);
325 if (ret)
326 return ret;
327
328 return devm_iio_device_register(&spi->dev, indio_dev);
329 }
330
331 static const struct spi_device_id ad7887_id[] = {
332 {"ad7887", ID_AD7887},
333 {}
334 };
335 MODULE_DEVICE_TABLE(spi, ad7887_id);
336
337 static struct spi_driver ad7887_driver = {
338 .driver = {
339 .name = "ad7887",
340 },
341 .probe = ad7887_probe,
342 .id_table = ad7887_id,
343 };
344 module_spi_driver(ad7887_driver);
345
346 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
347 MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
348 MODULE_LICENSE("GPL v2");
349