Searched refs:adpa (Results 1 – 4 of 4) sorted by relevance
171 u32 adpa; in intel_crt_set_dpms() local174 adpa = ADPA_HOTPLUG_BITS; in intel_crt_set_dpms()176 adpa = 0; in intel_crt_set_dpms()196 adpa |= ADPA_DAC_ENABLE; in intel_crt_set_dpms()460 u32 adpa; in ilk_crt_detect_hotplug() local476 adpa &= ~ADPA_DAC_ENABLE; in ilk_crt_detect_hotplug()500 adpa, ret); in ilk_crt_detect_hotplug()511 u32 adpa; in valleyview_crt_detect_hotplug() local945 u32 adpa; in intel_crt_reset() local949 adpa |= ADPA_HOTPLUG_BITS; in intel_crt_reset()[all …]
97 u32 adpa, dpll_md; in cdv_intel_crt_mode_set() local117 adpa = 0; in cdv_intel_crt_mode_set()119 adpa |= ADPA_HSYNC_ACTIVE_HIGH; in cdv_intel_crt_mode_set()121 adpa |= ADPA_VSYNC_ACTIVE_HIGH; in cdv_intel_crt_mode_set()124 adpa |= ADPA_PIPE_A_SELECT; in cdv_intel_crt_mode_set()126 adpa |= ADPA_PIPE_B_SELECT; in cdv_intel_crt_mode_set()128 REG_WRITE(adpa_reg, adpa); in cdv_intel_crt_mode_set()
573 hw->adpa = INREG(ADPA); in intelfbhw_read_hw_state()801 printk(" ADPA: 0x%08x\n", hw->adpa); in intelfbhw_print_hw_state()1084 hw->adpa &= ~ADPA_USE_VGA_HVPOLARITY; in intelfbhw_mode_to_hw()1091 hw->adpa &= ~((ADPA_SYNC_ACTIVE_MASK << ADPA_VSYNC_ACTIVE_SHIFT) | in intelfbhw_mode_to_hw()1093 hw->adpa |= (hsync_pol << ADPA_HSYNC_ACTIVE_SHIFT) | in intelfbhw_mode_to_hw()1097 hw->adpa &= ~(PIPE_MASK << ADPA_PIPE_SELECT_SHIFT); in intelfbhw_mode_to_hw()1098 hw->adpa |= (pipe << ADPA_PIPE_SELECT_SHIFT); in intelfbhw_mode_to_hw()1101 hw->adpa &= ~ADPA_DPMS_CONTROL_MASK; in intelfbhw_mode_to_hw()1102 hw->adpa |= ADPA_DPMS_D0; in intelfbhw_mode_to_hw()1104 hw->adpa |= ADPA_DAC_ENABLE; in intelfbhw_mode_to_hw()[all …]
200 u32 adpa; member
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