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Searched refs:amdgpu_ring_emit_wreg (Results 1 – 21 of 21) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dhdp_v4_0.c46amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in hdp_v4_0_flush_hdp()
58 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in hdp_v4_0_invalidate_hdp()
A Dhdp_v5_0.c37amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in hdp_v5_0_flush_hdp()
46 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in hdp_v5_0_invalidate_hdp()
A Dhdp_v6_0.c37amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in hdp_v6_0_flush_hdp()
A Dgmc_v11_0.c396 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v11_0_emit_flush_gpu_tlb()
400 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v11_0_emit_flush_gpu_tlb()
416 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v11_0_emit_flush_gpu_tlb()
437 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v11_0_emit_pasid_mapping()
A Dhdp_v5_2.c38 amdgpu_ring_emit_wreg(ring, in hdp_v5_2_flush_hdp()
A Dgmc_v10_0.c501 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v10_0_emit_flush_gpu_tlb()
505 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v10_0_emit_flush_gpu_tlb()
521 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v10_0_emit_flush_gpu_tlb()
542 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v10_0_emit_pasid_mapping()
A Dgmc_v9_0.c1009 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v9_0_emit_flush_gpu_tlb()
1013 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v9_0_emit_flush_gpu_tlb()
1029 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v9_0_emit_flush_gpu_tlb()
1050 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v9_0_emit_pasid_mapping()
A Dgmc_v7_0.c482 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
485 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v7_0_emit_flush_gpu_tlb()
493 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v7_0_emit_pasid_mapping()
A Dgmc_v6_0.c364 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
367 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v6_0_emit_flush_gpu_tlb()
A Dgmc_v8_0.c681 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v8_0_emit_flush_gpu_tlb()
684 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v8_0_emit_flush_gpu_tlb()
692 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v8_0_emit_pasid_mapping()
A Damdgpu_ring.c390 amdgpu_ring_emit_wreg(ring, reg0, ref); in amdgpu_ring_emit_reg_write_reg_wait_helper()
A Damdgpu_ring.h311 #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) macro
A Dcik.c1895 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in cik_flush_hdp()
1906 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in cik_invalidate_hdp()
A Dvi.c1349 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in vi_flush_hdp()
1360 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in vi_invalidate_hdp()
A Dsi.c1489 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in si_flush_hdp()
1500 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in si_invalidate_hdp()
A Damdgpu_gfx.c873 amdgpu_ring_emit_wreg(ring, reg, v); in amdgpu_kiq_wreg()
A Dsdma_v6_0.c1206 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v6_0_ring_emit_reg_write_reg_wait()
A Dsdma_v5_2.c1170 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v5_2_ring_emit_reg_write_reg_wait()
A Dsdma_v5_0.c1334 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v5_0_ring_emit_reg_write_reg_wait()
A Dgfx_v9_0.c5367 amdgpu_ring_emit_wreg(ring, in gfx_v9_0_ring_preempt_ib()
6698 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v9_0_emit_wave_limit_cs()
6713 amdgpu_ring_emit_wreg(ring, in gfx_v9_0_emit_wave_limit()
A Dgfx_v8_0.c6843 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v8_0_emit_wave_limit_cs()
6859 amdgpu_ring_emit_wreg(ring, mmSPI_WCL_PIPE_PERCENT_GFX, val); in gfx_v8_0_emit_wave_limit()

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