| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | jpeg_v1_0.c | 182 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_start()
201 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_end()
226 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
230 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
234 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
238 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
242 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
246 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
250 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
254 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
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| A D | jpeg_v2_0.c | 487 amdgpu_ring_write(ring, seq); in jpeg_v2_0_dec_ring_emit_fence()
491 amdgpu_ring_write(ring, seq); in jpeg_v2_0_dec_ring_emit_fence()
503 amdgpu_ring_write(ring, 0x8); in jpeg_v2_0_dec_ring_emit_fence()
507 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_fence()
518 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_fence()
571 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_ib()
602 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_reg_wait()
603 amdgpu_ring_write(ring, in jpeg_v2_0_dec_ring_emit_reg_wait()
635 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_wreg()
636 amdgpu_ring_write(ring, in jpeg_v2_0_dec_ring_emit_wreg()
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| A D | vcn_sw_ring.c | 33 amdgpu_ring_write(ring, addr); in vcn_dec_sw_ring_emit_fence()
35 amdgpu_ring_write(ring, seq); in vcn_dec_sw_ring_emit_fence()
41 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_END); in vcn_dec_sw_ring_insert_end()
49 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_IB); in vcn_dec_sw_ring_emit_ib()
50 amdgpu_ring_write(ring, vmid); in vcn_dec_sw_ring_emit_ib()
53 amdgpu_ring_write(ring, ib->length_dw); in vcn_dec_sw_ring_emit_ib()
60 amdgpu_ring_write(ring, reg << 2); in vcn_dec_sw_ring_emit_reg_wait()
61 amdgpu_ring_write(ring, mask); in vcn_dec_sw_ring_emit_reg_wait()
62 amdgpu_ring_write(ring, val); in vcn_dec_sw_ring_emit_reg_wait()
84 amdgpu_ring_write(ring, reg << 2); in vcn_dec_sw_ring_emit_wreg()
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| A D | uvd_v6_0.c | 486 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init()
490 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init()
494 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init()
499 amdgpu_ring_write(ring, 0x8); in uvd_v6_0_hw_init()
502 amdgpu_ring_write(ring, 3); in uvd_v6_0_hw_init()
931 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence()
934 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence()
936 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence()
938 amdgpu_ring_write(ring, 2); in uvd_v6_0_ring_emit_fence()
1079 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_vm_flush()
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| A D | uvd_v5_0.c | 174 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init()
178 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init()
182 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init()
187 amdgpu_ring_write(ring, 0x8); in uvd_v5_0_hw_init()
190 amdgpu_ring_write(ring, 3); in uvd_v5_0_hw_init()
494 amdgpu_ring_write(ring, seq); in uvd_v5_0_ring_emit_fence()
500 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence()
503 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence()
505 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence()
507 amdgpu_ring_write(ring, 2); in uvd_v5_0_ring_emit_fence()
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| A D | uvd_v3_1.c | 116 amdgpu_ring_write(ring, seq); in uvd_v3_1_ring_emit_fence()
122 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence()
125 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence()
127 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence()
129 amdgpu_ring_write(ring, 2); in uvd_v3_1_ring_emit_fence()
175 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_insert_nop()
663 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init()
667 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init()
671 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init()
676 amdgpu_ring_write(ring, 0x8); in uvd_v3_1_hw_init()
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| A D | uvd_v4_2.c | 177 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init()
181 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init()
185 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init()
190 amdgpu_ring_write(ring, 0x8); in uvd_v4_2_hw_init()
193 amdgpu_ring_write(ring, 3); in uvd_v4_2_hw_init()
478 amdgpu_ring_write(ring, seq); in uvd_v4_2_ring_emit_fence()
484 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence()
487 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence()
489 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence()
491 amdgpu_ring_write(ring, 2); in uvd_v4_2_ring_emit_fence()
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| A D | sdma_v2_4.c | 230 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v2_4_ring_insert_nop()
233 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v2_4_ring_insert_nop()
261 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib()
262 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_ib()
263 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_ib()
314 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v2_4_ring_emit_fence()
563 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v2_4_ring_test_ring()
802 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_vm_flush()
804 amdgpu_ring_write(ring, 0); /* mask */ in sdma_v2_4_ring_emit_vm_flush()
814 amdgpu_ring_write(ring, reg); in sdma_v2_4_ring_emit_wreg()
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| A D | si_dma.c | 98 amdgpu_ring_write(ring, addr & 0xfffffffc); in si_dma_ring_emit_fence()
100 amdgpu_ring_write(ring, seq); in si_dma_ring_emit_fence()
105 amdgpu_ring_write(ring, addr & 0xfffffffc); in si_dma_ring_emit_fence()
107 amdgpu_ring_write(ring, upper_32_bits(seq)); in si_dma_ring_emit_fence()
223 amdgpu_ring_write(ring, 0xDEADBEEF); in si_dma_ring_test_ring()
428 amdgpu_ring_write(ring, lower_32_bits(addr)); in si_dma_ring_emit_pipeline_sync()
431 amdgpu_ring_write(ring, seq); /* value */ in si_dma_ring_emit_pipeline_sync()
454 amdgpu_ring_write(ring, 1 << vmid); /* mask */ in si_dma_ring_emit_vm_flush()
455 amdgpu_ring_write(ring, 0); /* value */ in si_dma_ring_emit_vm_flush()
463 amdgpu_ring_write(ring, (0xf << 16) | reg); in si_dma_ring_emit_wreg()
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| A D | uvd_v7_0.c | 1182 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1185 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1188 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1191 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1195 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1198 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1201 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1258 amdgpu_ring_write(ring, in uvd_v7_0_ring_test_ring()
1323 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_ib()
1327 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_ib()
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| A D | sdma_v6_0.c | 88 amdgpu_ring_write(ring, 1); in sdma_v6_0_ring_init_cond_exec()
230 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v6_0_ring_insert_nop()
233 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v6_0_ring_insert_nop()
267 amdgpu_ring_write(ring, ib->length_dw); in sdma_v6_0_ring_emit_ib()
346 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v6_0_ring_emit_fence()
911 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v6_0_ring_test_ring()
1184 amdgpu_ring_write(ring, reg); in sdma_v6_0_ring_emit_wreg()
1185 amdgpu_ring_write(ring, val); in sdma_v6_0_ring_emit_wreg()
1194 amdgpu_ring_write(ring, reg << 2); in sdma_v6_0_ring_emit_reg_wait()
1195 amdgpu_ring_write(ring, 0); in sdma_v6_0_ring_emit_reg_wait()
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| A D | cik_sdma.c | 204 amdgpu_ring_write(ring, ring->funcs->nop | in cik_sdma_ring_insert_nop()
207 amdgpu_ring_write(ring, ring->funcs->nop); in cik_sdma_ring_insert_nop()
234 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
284 amdgpu_ring_write(ring, lower_32_bits(seq)); in cik_sdma_ring_emit_fence()
630 amdgpu_ring_write(ring, 0xDEADBEEF); in cik_sdma_ring_test_ring()
837 amdgpu_ring_write(ring, addr & 0xfffffffc); in cik_sdma_ring_emit_pipeline_sync()
864 amdgpu_ring_write(ring, 0); in cik_sdma_ring_emit_vm_flush()
865 amdgpu_ring_write(ring, 0); /* reference */ in cik_sdma_ring_emit_vm_flush()
866 amdgpu_ring_write(ring, 0); /* mask */ in cik_sdma_ring_emit_vm_flush()
874 amdgpu_ring_write(ring, reg); in cik_sdma_ring_emit_wreg()
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| A D | vcn_v2_0.c | 1383 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_insert_start()
1420 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_insert_nop()
1441 amdgpu_ring_write(ring, seq); in vcn_v2_0_dec_ring_emit_fence()
1453 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_emit_fence()
1456 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_emit_fence()
1482 amdgpu_ring_write(ring, vmid); in vcn_v2_0_dec_ring_emit_ib()
1501 amdgpu_ring_write(ring, val); in vcn_v2_0_dec_ring_emit_reg_wait()
1535 amdgpu_ring_write(ring, val); in vcn_v2_0_dec_ring_emit_wreg()
1629 amdgpu_ring_write(ring, seq); in vcn_v2_0_enc_ring_emit_fence()
1668 amdgpu_ring_write(ring, val); in vcn_v2_0_enc_ring_emit_reg_wait()
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| A D | gfx_v7_0.c | 2218 amdgpu_ring_write(ring, in gfx_v7_0_ring_emit_ib_gfx()
2252 amdgpu_ring_write(ring, in gfx_v7_0_ring_emit_ib_compute()
2278 amdgpu_ring_write(ring, 0); in gfx_v7_ring_emit_cntxcntl()
2489 amdgpu_ring_write(ring, in gfx_v7_0_cp_gfx_start()
2507 amdgpu_ring_write(ring, 0); in gfx_v7_0_cp_gfx_start()
3191 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_vm_flush()
3219 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_wreg()
4049 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch()
4057 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch()
4065 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch()
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| A D | sdma_v5_2.c | 99 amdgpu_ring_write(ring, 1); in sdma_v5_2_ring_init_cond_exec()
213 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v5_2_ring_insert_nop()
216 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v5_2_ring_insert_nop()
252 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_2_ring_emit_ib()
331 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v5_2_ring_emit_fence()
868 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v5_2_ring_test_ring()
1148 amdgpu_ring_write(ring, reg); in sdma_v5_2_ring_emit_wreg()
1149 amdgpu_ring_write(ring, val); in sdma_v5_2_ring_emit_wreg()
1158 amdgpu_ring_write(ring, reg << 2); in sdma_v5_2_ring_emit_reg_wait()
1159 amdgpu_ring_write(ring, 0); in sdma_v5_2_ring_emit_reg_wait()
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| A D | vcn_v1_0.c | 1430 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_start()
1433 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_start()
1449 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_end()
1471 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1474 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1477 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1480 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1484 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1487 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1490 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
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| A D | sdma_v3_0.c | 404 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v3_0_ring_insert_nop()
407 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v3_0_ring_insert_nop()
435 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
436 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_ib()
437 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_ib()
488 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v3_0_ring_emit_fence()
835 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v3_0_ring_test_ring()
1073 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_vm_flush()
1075 amdgpu_ring_write(ring, 0); /* mask */ in sdma_v3_0_ring_emit_vm_flush()
1085 amdgpu_ring_write(ring, reg); in sdma_v3_0_ring_emit_wreg()
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| A D | sdma_v5_0.c | 261 amdgpu_ring_write(ring, 1); in sdma_v5_0_ring_init_cond_exec()
408 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v5_0_ring_insert_nop()
411 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v5_0_ring_insert_nop()
447 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
528 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v5_0_ring_emit_fence()
1032 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v5_0_ring_test_ring()
1312 amdgpu_ring_write(ring, reg); in sdma_v5_0_ring_emit_wreg()
1313 amdgpu_ring_write(ring, val); in sdma_v5_0_ring_emit_wreg()
1322 amdgpu_ring_write(ring, reg << 2); in sdma_v5_0_ring_emit_reg_wait()
1323 amdgpu_ring_write(ring, 0); in sdma_v5_0_ring_emit_reg_wait()
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| A D | gfx_v8_0.c | 4169 amdgpu_ring_write(ring, in gfx_v8_0_cp_gfx_start()
4172 amdgpu_ring_write(ring, in gfx_v8_0_cp_gfx_start()
4189 amdgpu_ring_write(ring, 0); in gfx_v8_0_cp_gfx_start()
5166 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
5174 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
5182 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
5190 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
6108 amdgpu_ring_write(ring, in gfx_v8_0_ring_emit_ib_gfx()
6142 amdgpu_ring_write(ring, in gfx_v8_0_ring_emit_ib_compute()
6218 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_vm_flush()
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| A D | gfx_v6_0.c | 1812 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_fence()
1819 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_fence()
1843 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_ib()
1854 amdgpu_ring_write(ring, in gfx_v6_0_ring_emit_ib()
2000 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start()
2001 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start()
2023 amdgpu_ring_write(ring, in gfx_v6_0_cp_gfx_start()
2036 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start()
2302 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_vm_flush()
2329 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_wreg()
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| A D | gfx_v9_0.c | 770 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
774 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
776 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
806 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_map_queues()
827 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_unmap_queues()
850 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status()
855 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status()
869 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_invalidate_tlbs()
976 amdgpu_ring_write(ring, in gfx_v9_0_wait_reg_mem()
5129 amdgpu_ring_write(ring, in gfx_v9_0_ring_emit_ib_gfx()
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| A D | gfx_v11_0.c | 206 amdgpu_ring_write(kiq_ring, in gfx11_kiq_unmap_queues()
228 amdgpu_ring_write(kiq_ring, in gfx11_kiq_query_status()
286 amdgpu_ring_write(ring, reg); in gfx_v11_0_write_data_to_reg()
287 amdgpu_ring_write(ring, 0); in gfx_v11_0_write_data_to_reg()
288 amdgpu_ring_write(ring, val); in gfx_v11_0_write_data_to_reg()
297 amdgpu_ring_write(ring, in gfx_v11_0_wait_reg_mem()
308 amdgpu_ring_write(ring, ref); in gfx_v11_0_wait_reg_mem()
3106 amdgpu_ring_write(ring, in gfx_v11_0_cp_gfx_start()
5395 amdgpu_ring_write(ring, in gfx_v11_0_ring_emit_ib_gfx()
5434 amdgpu_ring_write(ring, in gfx_v11_0_ring_emit_ib_compute()
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| A D | vce_v3_0.c | 869 amdgpu_ring_write(ring, VCE_CMD_IB_VM); in vce_v3_0_ring_emit_ib()
870 amdgpu_ring_write(ring, vmid); in vce_v3_0_ring_emit_ib()
873 amdgpu_ring_write(ring, ib->length_dw); in vce_v3_0_ring_emit_ib()
879 amdgpu_ring_write(ring, VCE_CMD_UPDATE_PTB); in vce_v3_0_emit_vm_flush()
880 amdgpu_ring_write(ring, vmid); in vce_v3_0_emit_vm_flush()
881 amdgpu_ring_write(ring, pd_addr >> 12); in vce_v3_0_emit_vm_flush()
883 amdgpu_ring_write(ring, VCE_CMD_FLUSH_TLB); in vce_v3_0_emit_vm_flush()
884 amdgpu_ring_write(ring, vmid); in vce_v3_0_emit_vm_flush()
885 amdgpu_ring_write(ring, VCE_CMD_END); in vce_v3_0_emit_vm_flush()
893 amdgpu_ring_write(ring, VCE_CMD_WAIT_GE); in vce_v3_0_emit_pipeline_sync()
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| A D | vce_v4_0.c | 988 amdgpu_ring_write(ring, VCE_CMD_IB_VM); in vce_v4_0_ring_emit_ib()
989 amdgpu_ring_write(ring, vmid); in vce_v4_0_ring_emit_ib()
1001 amdgpu_ring_write(ring, addr); in vce_v4_0_ring_emit_fence()
1003 amdgpu_ring_write(ring, seq); in vce_v4_0_ring_emit_fence()
1004 amdgpu_ring_write(ring, VCE_CMD_TRAP); in vce_v4_0_ring_emit_fence()
1009 amdgpu_ring_write(ring, VCE_CMD_END); in vce_v4_0_ring_insert_end()
1016 amdgpu_ring_write(ring, reg << 2); in vce_v4_0_emit_reg_wait()
1017 amdgpu_ring_write(ring, mask); in vce_v4_0_emit_reg_wait()
1018 amdgpu_ring_write(ring, val); in vce_v4_0_emit_reg_wait()
1038 amdgpu_ring_write(ring, reg << 2); in vce_v4_0_emit_wreg()
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| A D | sdma_v4_0.c | 773 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib()
774 amdgpu_ring_write(ring, 0); in sdma_v4_0_ring_emit_ib()
775 amdgpu_ring_write(ring, 0); in sdma_v4_0_ring_emit_ib()
791 amdgpu_ring_write(ring, addr0); in sdma_v4_0_wait_reg_mem()
792 amdgpu_ring_write(ring, addr1); in sdma_v4_0_wait_reg_mem()
795 amdgpu_ring_write(ring, addr0 << 2); in sdma_v4_0_wait_reg_mem()
796 amdgpu_ring_write(ring, addr1 << 2); in sdma_v4_0_wait_reg_mem()
799 amdgpu_ring_write(ring, mask); /* mask */ in sdma_v4_0_wait_reg_mem()
1453 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v4_0_ring_test_ring()
1691 amdgpu_ring_write(ring, reg); in sdma_v4_0_ring_emit_wreg()
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