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/linux-6.3-rc2/Documentation/devicetree/bindings/regulator/
A Danatop-regulator.yaml21 anatop-reg-offset:
25 anatop-vol-bit-shift:
29 anatop-vol-bit-width:
33 anatop-min-bit-val:
37 anatop-min-voltage:
41 anatop-max-voltage:
57 anatop-enable-bit:
67 - anatop-reg-offset
70 - anatop-min-bit-val
71 - anatop-min-voltage
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/clock/
A Dfsl,imx8m-anatop.yaml4 $id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
13 NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
19 - fsl,imx8mm-anatop
20 - fsl,imx8mq-anatop
23 - fsl,imx8mn-anatop
24 - fsl,imx8mp-anatop
25 - const: fsl,imx8mm-anatop
45 anatop: clock-controller@30360000 {
46 compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
/linux-6.3-rc2/arch/arm/boot/dts/
A Dimx6sl.dtsi522 anatop: anatop@20c8000 { label
524 "fsl,imx6q-anatop",
540 anatop-min-bit-val = <4>;
543 anatop-enable-bit = <0>;
555 anatop-min-bit-val = <0>;
558 anatop-enable-bit = <0>;
570 anatop-min-bit-val = <0>;
573 anatop-enable-bit = <0>;
630 fsl,tempmon = <&anatop>;
642 fsl,anatop = <&anatop>;
[all …]
A Dimx6qdl.dtsi690 anatop: anatop@20c8000 { label
706 anatop-min-bit-val = <4>;
709 anatop-enable-bit = <0>;
721 anatop-min-bit-val = <0>;
724 anatop-enable-bit = <0>;
736 anatop-min-bit-val = <0>;
739 anatop-enable-bit = <0>;
754 anatop-min-bit-val = <1>;
797 fsl,tempmon = <&anatop>;
810 fsl,anatop = <&anatop>;
[all …]
A Dimx6sx.dtsi615 anatop: anatop@20c8000 { label
616 compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop",
632 anatop-min-bit-val = <4>;
635 anatop-enable-bit = <0>;
650 anatop-enable-bit = <0>;
665 anatop-enable-bit = <0>;
722 fsl,tempmon = <&anatop>;
734 fsl,anatop = <&anatop>;
742 fsl,anatop = <&anatop>;
903 fsl,anatop = <&anatop>;
[all …]
A Dimx6ul.dtsi578 anatop: anatop@20c8000 { label
579 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
592 anatop-vol-bit-shift = <8>;
594 anatop-min-bit-val = <0>;
597 anatop-enable-bit = <0>;
612 anatop-min-bit-val = <1>;
629 anatop-min-bit-val = <1>;
638 fsl,tempmon = <&anatop>;
651 fsl,anatop = <&anatop>;
660 fsl,anatop = <&anatop>;
[all …]
A Dimx6sll.dtsi502 anatop: anatop@20c8000 { label
504 "fsl,imx6q-anatop",
519 anatop-reg-offset = <0x120>;
520 anatop-vol-bit-shift = <8>;
521 anatop-vol-bit-width = <5>;
522 anatop-min-bit-val = <0>;
525 anatop-enable-bit = <0>;
532 fsl,tempmon = <&anatop>;
546 fsl,anatop = <&anatop>;
556 fsl,anatop = <&anatop>;
[all …]
A Dimx7s.dtsi565 anatop: anatop@30360000 { label
566 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
577 anatop-reg-offset = <0x210>;
578 anatop-vol-bit-shift = <8>;
579 anatop-vol-bit-width = <5>;
580 anatop-min-bit-val = <8>;
583 anatop-enable-bit = <0>;
592 anatop-vol-bit-shift = <8>;
593 anatop-vol-bit-width = <5>;
597 anatop-enable-bit = <0>;
[all …]
A Dimxrt1050.dtsi46 anatop: anatop@400d8000 { label
47 compatible = "fsl,imxrt-anatop";
A Dvfxxx.dtsi374 anatop: anatop@40050000 { label
375 compatible = "fsl,vf610-anatop", "syscon";
384 fsl,anatop = <&anatop>;
393 fsl,anatop = <&anatop>;
/linux-6.3-rc2/arch/arm/mach-imx/
A Danatop.c35 static struct regmap *anatop; variable
41 regmap_read(anatop, ANADIG_ANA_MISC0, &val); in imx_anatop_enable_weak2p5()
47 regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG); in imx_anatop_enable_weak2p5()
52 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_fet_odrive()
58 regmap_write(anatop, ANADIG_REG_2P5 + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_2p5_pulldown()
64 regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), in imx_anatop_disconnect_high_snvs()
160 anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); in imx_anatop_init()
161 if (IS_ERR(anatop)) in imx_anatop_init()
A DMakefile32 obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
/linux-6.3-rc2/Documentation/devicetree/bindings/phy/
A Dmxs-usb-phy.txt15 - fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
32 fsl,anatop = <&anatop>;
/linux-6.3-rc2/Documentation/devicetree/bindings/thermal/
A Dimx-thermal.yaml44 description: Phandle to anatop system controller node.
87 anatop@20c8000 {
88 compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
97 fsl,tempmon = <&anatop>;
/linux-6.3-rc2/arch/arm64/boot/dts/freescale/
A Dimx93.dtsi279 anatop: anatop@44480000 { label
280 compatible = "fsl,imx93-anatop", "syscon";
A Dimx8mn.dtsi599 anatop: clock-controller@30360000 { label
600 compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
A Dimx8mp.dtsi464 anatop: clock-controller@30360000 { label
465 compatible = "fsl,imx8mp-anatop", "fsl,imx8mm-anatop";
A Dimx8mm.dtsi598 anatop: clock-controller@30360000 { label
599 compatible = "fsl,imx8mm-anatop";
A Dimx8mq.dtsi621 anatop: clock-controller@30360000 { label
622 compatible = "fsl,imx8mq-anatop";
/linux-6.3-rc2/drivers/regulator/
A DMakefile23 obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o

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