Searched refs:bar1_index (Results 1 – 5 of 5) sorted by relevance
636 bar1_index.u32 = 0; in octeon_pci_setup()638 bar1_index.s.addr_idx = in octeon_pci_setup()641 bar1_index.s.ca = 1; in octeon_pci_setup()643 bar1_index.s.end_swp = 1; in octeon_pci_setup()645 bar1_index.s.addr_v = 1; in octeon_pci_setup()647 bar1_index.u32); in octeon_pci_setup()672 bar1_index.u32 = 0; in octeon_pci_setup()674 bar1_index.s.addr_idx = in octeon_pci_setup()677 bar1_index.s.ca = 1; in octeon_pci_setup()681 bar1_index.s.addr_v = 1; in octeon_pci_setup()[all …]
705 union cvmx_npei_bar1_indexx bar1_index; in __cvmx_pcie_rc_initialize_gen1() local925 bar1_index.u32 = 0; in __cvmx_pcie_rc_initialize_gen1()927 bar1_index.s.ca = 1; /* Not Cached */ in __cvmx_pcie_rc_initialize_gen1()928 bar1_index.s.end_swp = 1; /* Endian Swap mode */ in __cvmx_pcie_rc_initialize_gen1()929 bar1_index.s.addr_v = 1; /* Valid entry */ in __cvmx_pcie_rc_initialize_gen1()941 bar1_index.u32); in __cvmx_pcie_rc_initialize_gen1()1162 union cvmx_pemx_bar1_indexx bar1_index; in __cvmx_pcie_rc_initialize_gen2() local1408 bar1_index.u64 = 0; in __cvmx_pcie_rc_initialize_gen2()1410 bar1_index.s.ca = 1; /* Not Cached */ in __cvmx_pcie_rc_initialize_gen2()1411 bar1_index.s.end_swp = 1; /* Endian Swap mode */ in __cvmx_pcie_rc_initialize_gen2()[all …]
106 int bar1_index = oct->console_nb_info.bar1_index; in __octeon_pci_rw_core_mem() local109 + (bar1_index << ilog2(OCTEON_BAR1_ENTRY_SIZE)) in __octeon_pci_rw_core_mem()
556 oct->console_nb_info.bar1_index = BAR1_INDEX_STATIC_MAP; in octeon_init_consoles()557 oct->fn_list.bar1_idx_setup(oct, addr, oct->console_nb_info.bar1_index, in octeon_init_consoles()
526 int bar1_index; member
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