Searched refs:boot_values (Results 1 – 18 of 18) sorted by relevance
343 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()344 smu->smu_table.boot_values.dcefclk = 0; in smu_v12_0_get_vbios_bootup_values()350 smu->smu_table.boot_values.pp_table_id = 0; in smu_v12_0_get_vbios_bootup_values()360 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()361 smu->smu_table.boot_values.dcefclk = 0; in smu_v12_0_get_vbios_bootup_values()377 &smu->smu_table.boot_values.socclk); in smu_v12_0_get_vbios_bootup_values()382 &smu->smu_table.boot_values.dcefclk); in smu_v12_0_get_vbios_bootup_values()387 &smu->smu_table.boot_values.vclk); in smu_v12_0_get_vbios_bootup_values()392 &smu->smu_table.boot_values.dclk); in smu_v12_0_get_vbios_bootup_values()399 &smu->smu_table.boot_values.fclk); in smu_v12_0_get_vbios_bootup_values()[all …]
293 clock_limit = smu->smu_table.boot_values.uclk; in renoir_get_dpm_ultimate_freq()297 clock_limit = smu->smu_table.boot_values.gfxclk; in renoir_get_dpm_ultimate_freq()300 clock_limit = smu->smu_table.boot_values.socclk; in renoir_get_dpm_ultimate_freq()
531 boot_values->ulSocClk = 0; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()532 boot_values->ulDCEFClk = 0; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()535 boot_values->ulSocClk = frequency; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()538 boot_values->ulDCEFClk = frequency; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()541 boot_values->ulEClk = frequency; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()544 boot_values->ulVClk = frequency; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()547 boot_values->ulDClk = frequency; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()567 boot_values->ulSocClk = 0; in pp_atomfwctrl_copy_vbios_bootup_values_3_1()568 boot_values->ulDCEFClk = 0; in pp_atomfwctrl_copy_vbios_bootup_values_3_1()607 boot_values, fwinfo_3_2); in pp_atomfwctrl_get_vbios_bootup_values()[all …]
236 struct pp_atomfwctrl_bios_boot_up_values *boot_values);
207 pptable_id = smu->smu_table.boot_values.pp_table_id; in smu_v13_0_init_pptable_microcode()625 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()626 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()632 smu->smu_table.boot_values.pp_table_id = 0; in smu_v13_0_get_vbios_bootup_values()639 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()640 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()654 smu->smu_table.boot_values.socclk = 0; in smu_v13_0_get_vbios_bootup_values()655 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()1585 clock_limit = smu->smu_table.boot_values.uclk; in smu_v13_0_get_dpm_ultimate_freq()1589 clock_limit = smu->smu_table.boot_values.gfxclk; in smu_v13_0_get_dpm_ultimate_freq()[all …]
732 clock_limit = smu->smu_table.boot_values.uclk; in smu_v13_0_4_get_dpm_ultimate_freq()735 clock_limit = smu->smu_table.boot_values.fclk; in smu_v13_0_4_get_dpm_ultimate_freq()739 clock_limit = smu->smu_table.boot_values.gfxclk; in smu_v13_0_4_get_dpm_ultimate_freq()742 clock_limit = smu->smu_table.boot_values.socclk; in smu_v13_0_4_get_dpm_ultimate_freq()745 clock_limit = smu->smu_table.boot_values.vclk; in smu_v13_0_4_get_dpm_ultimate_freq()748 clock_limit = smu->smu_table.boot_values.dclk; in smu_v13_0_4_get_dpm_ultimate_freq()
732 clock_limit = smu->smu_table.boot_values.uclk; in smu_v13_0_5_get_dpm_ultimate_freq()735 clock_limit = smu->smu_table.boot_values.fclk; in smu_v13_0_5_get_dpm_ultimate_freq()739 clock_limit = smu->smu_table.boot_values.gfxclk; in smu_v13_0_5_get_dpm_ultimate_freq()742 clock_limit = smu->smu_table.boot_values.socclk; in smu_v13_0_5_get_dpm_ultimate_freq()745 clock_limit = smu->smu_table.boot_values.vclk; in smu_v13_0_5_get_dpm_ultimate_freq()748 clock_limit = smu->smu_table.boot_values.dclk; in smu_v13_0_5_get_dpm_ultimate_freq()
858 clock_limit = smu->smu_table.boot_values.uclk; in yellow_carp_get_dpm_ultimate_freq()861 clock_limit = smu->smu_table.boot_values.fclk; in yellow_carp_get_dpm_ultimate_freq()865 clock_limit = smu->smu_table.boot_values.gfxclk; in yellow_carp_get_dpm_ultimate_freq()868 clock_limit = smu->smu_table.boot_values.socclk; in yellow_carp_get_dpm_ultimate_freq()871 clock_limit = smu->smu_table.boot_values.vclk; in yellow_carp_get_dpm_ultimate_freq()874 clock_limit = smu->smu_table.boot_values.dclk; in yellow_carp_get_dpm_ultimate_freq()
564 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_7_set_default_dpm_table()580 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in smu_v13_0_7_set_default_dpm_table()596 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in smu_v13_0_7_set_default_dpm_table()612 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100; in smu_v13_0_7_set_default_dpm_table()628 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclk / 100; in smu_v13_0_7_set_default_dpm_table()644 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclk / 100; in smu_v13_0_7_set_default_dpm_table()
556 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_0_set_default_dpm_table()589 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in smu_v13_0_0_set_default_dpm_table()605 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in smu_v13_0_0_set_default_dpm_table()621 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100; in smu_v13_0_0_set_default_dpm_table()637 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclk / 100; in smu_v13_0_0_set_default_dpm_table()653 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclk / 100; in smu_v13_0_0_set_default_dpm_table()
324 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in aldebaran_set_default_dpm_table()343 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in aldebaran_set_default_dpm_table()359 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in aldebaran_set_default_dpm_table()375 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100; in aldebaran_set_default_dpm_table()438 smu->smu_table.boot_values.pp_table_id = 0; in aldebaran_setup_pptable()
556 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()557 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()573 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()574 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()590 &smu->smu_table.boot_values.socclk); in smu_v11_0_get_vbios_bootup_values()595 &smu->smu_table.boot_values.dcefclk); in smu_v11_0_get_vbios_bootup_values()600 &smu->smu_table.boot_values.eclk); in smu_v11_0_get_vbios_bootup_values()605 &smu->smu_table.boot_values.vclk); in smu_v11_0_get_vbios_bootup_values()610 &smu->smu_table.boot_values.dclk); in smu_v11_0_get_vbios_bootup_values()617 &smu->smu_table.boot_values.fclk); in smu_v11_0_get_vbios_bootup_values()[all …]
929 clock_limit = smu->smu_table.boot_values.uclk; in vangogh_get_dpm_ultimate_freq()932 clock_limit = smu->smu_table.boot_values.fclk; in vangogh_get_dpm_ultimate_freq()936 clock_limit = smu->smu_table.boot_values.gfxclk; in vangogh_get_dpm_ultimate_freq()939 clock_limit = smu->smu_table.boot_values.socclk; in vangogh_get_dpm_ultimate_freq()942 clock_limit = smu->smu_table.boot_values.vclk; in vangogh_get_dpm_ultimate_freq()945 clock_limit = smu->smu_table.boot_values.dclk; in vangogh_get_dpm_ultimate_freq()
987 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in navi10_set_default_dpm_table()1005 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in navi10_set_default_dpm_table()1023 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in navi10_set_default_dpm_table()1041 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclk / 100; in navi10_set_default_dpm_table()1059 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclk / 100; in navi10_set_default_dpm_table()1077 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1095 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1113 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1131 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()
945 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in sienna_cichlid_set_default_dpm_table()963 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in sienna_cichlid_set_default_dpm_table()981 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in sienna_cichlid_set_default_dpm_table()999 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100; in sienna_cichlid_set_default_dpm_table()1021 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclk / 100; in sienna_cichlid_set_default_dpm_table()1043 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclk / 100; in sienna_cichlid_set_default_dpm_table()1062 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()1080 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()1098 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()1116 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()[all …]
346 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in arcturus_set_default_dpm_table()364 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in arcturus_set_default_dpm_table()382 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in arcturus_set_default_dpm_table()400 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100; in arcturus_set_default_dpm_table()937 smu->smu_table.boot_values.lclk / 100); in arcturus_print_clk_levels()
340 struct smu_bios_boot_up_values boot_values; member
1336 smu->smu_table.boot_values.dcefclk / 100); in smu_smc_hw_setup()
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