Searched refs:buf_mask (Results 1 – 13 of 13) sorted by relevance
295 ring->buf_mask = (ring->ring_size / 4) - 1; in amdgpu_ring_init()297 0xffffffffffffffff : ring->buf_mask; in amdgpu_ring_init()444 early[0] = amdgpu_ring_get_rptr(ring) & ring->buf_mask; in amdgpu_debugfs_ring_read()445 early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask; in amdgpu_debugfs_ring_read()446 early[2] = ring->wptr & ring->buf_mask; in amdgpu_debugfs_ring_read()
58 start = s_start & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()59 end = s_end & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()286 start = e->start_ptr_in_hw_ring & mux->real_ring->buf_mask; in amdgpu_ring_mux_get_rptr()287 end = e->end_ptr_in_hw_ring & mux->real_ring->buf_mask; in amdgpu_ring_mux_get_rptr()296 e->sw_rptr = (e->sw_cptr + offset) & ring->buf_mask; in amdgpu_ring_mux_get_rptr()
250 uint32_t buf_mask; member348 while (i <= ring->buf_mask) in amdgpu_ring_clear_ring()357 ring->ring[ring->wptr++ & ring->buf_mask] = v; in amdgpu_ring_write()371 occupied = ring->wptr & ring->buf_mask; in amdgpu_ring_write_multiple()373 chunk1 = ring->buf_mask + 1 - occupied; in amdgpu_ring_write_multiple()
89 ret = ring->wptr & ring->buf_mask;/* this is the offset we need patch later */ in sdma_v6_0_ring_init_cond_exec()100 BUG_ON(offset > ring->buf_mask); in sdma_v6_0_ring_patch_cond_exec()103 cur = (ring->wptr - 1) & ring->buf_mask; in sdma_v6_0_ring_patch_cond_exec()107 ring->ring[offset] = (ring->buf_mask + 1) - offset + cur; in sdma_v6_0_ring_patch_cond_exec()
100 ret = ring->wptr & ring->buf_mask;/* this is the offset we need patch later */ in sdma_v5_2_ring_init_cond_exec()111 BUG_ON(offset > ring->buf_mask); in sdma_v5_2_ring_patch_cond_exec()114 cur = (ring->wptr - 1) & ring->buf_mask; in sdma_v5_2_ring_patch_cond_exec()118 ring->ring[offset] = (ring->buf_mask + 1) - offset + cur; in sdma_v5_2_ring_patch_cond_exec()
262 ret = ring->wptr & ring->buf_mask;/* this is the offset we need patch later */ in sdma_v5_0_ring_init_cond_exec()273 BUG_ON(offset > ring->buf_mask); in sdma_v5_0_ring_patch_cond_exec()276 cur = (ring->wptr - 1) & ring->buf_mask; in sdma_v5_0_ring_patch_cond_exec()280 ring->ring[offset] = (ring->buf_mask + 1) - offset + cur; in sdma_v5_0_ring_patch_cond_exec()
5247 wptr_tmp = ring->wptr & ring->buf_mask; in gfx_v11_0_ring_set_wptr_gfx()5310 wptr_tmp = ring->wptr & ring->buf_mask; in gfx_v11_0_ring_set_wptr_compute()5574 ret = ring->wptr & ring->buf_mask; in gfx_v11_0_ring_emit_init_cond_exec()5583 BUG_ON(offset > ring->buf_mask); in gfx_v11_0_ring_emit_patch_cond_exec()5586 cur = (ring->wptr - 1) & ring->buf_mask; in gfx_v11_0_ring_emit_patch_cond_exec()5590 ring->ring[offset] = (ring->buf_mask + 1) - offset + cur; in gfx_v11_0_ring_emit_patch_cond_exec()
831 amdgpu_ring_write(kiq_ring, lower_32_bits(ring->wptr & ring->buf_mask)); in gfx_v9_0_kiq_unmap_queues()5499 ret = ring->wptr & ring->buf_mask; in gfx_v9_0_ring_emit_init_cond_exec()5507 BUG_ON(offset > ring->buf_mask); in gfx_v9_0_ring_emit_patch_cond_exec()5510 cur = (ring->wptr - 1) & ring->buf_mask; in gfx_v9_0_ring_emit_patch_cond_exec()
8283 wptr_tmp = ring->wptr & ring->buf_mask; in gfx_v10_0_ring_set_wptr_gfx()8346 wptr_tmp = ring->wptr & ring->buf_mask; in gfx_v10_0_ring_set_wptr_compute()8627 ret = ring->wptr & ring->buf_mask; in gfx_v10_0_ring_emit_init_cond_exec()8636 BUG_ON(offset > ring->buf_mask); in gfx_v10_0_ring_emit_patch_cond_exec()8639 cur = (ring->wptr - 1) & ring->buf_mask; in gfx_v10_0_ring_emit_patch_cond_exec()8643 ring->ring[offset] = (ring->buf_mask + 1) - offset + cur; in gfx_v10_0_ring_emit_patch_cond_exec()
6338 ret = ring->wptr & ring->buf_mask; in gfx_v8_0_ring_emit_init_cond_exec()6347 BUG_ON(offset > ring->buf_mask); in gfx_v8_0_ring_emit_patch_cond_exec()6350 cur = (ring->wptr & ring->buf_mask) - 1; in gfx_v8_0_ring_emit_patch_cond_exec()
95 dma->dma_out_mask = video->buf_mask; in isp_video_capture_start_streaming()198 video->buf_mask |= BIT(ivb->index); in isp_video_capture_buffer_queue()222 video->buf_mask = (1UL << video->buf_count) - 1; in isp_video_capture_buffer_queue()250 video->buf_mask &= ~BIT(buf_index); in fimc_isp_video_irq_handler()251 fimc_is_hw_set_isp_buf_mask(is, video->buf_mask); in fimc_isp_video_irq_handler()
137 unsigned int buf_mask; member
985 buf_mask
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