Searched refs:cacheline_size (Results 1 – 13 of 13) sorted by relevance
/linux-6.3-rc2/tools/perf/util/ |
A D | cacheline.h | 7 int __pure cacheline_size(void); 16 u64 size = cacheline_size(); in cl_address() 27 u64 size = cacheline_size(); in cl_offset()
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A D | cacheline.c | 17 int cacheline_size(void) in cacheline_size() function
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A D | sort.c | 3203 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add() 3249 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
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/linux-6.3-rc2/drivers/gpu/drm/amd/amdkfd/ |
A D | kfd_topology.h | 90 uint32_t cacheline_size; member
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A D | kfd_crat.c | 1108 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
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A D | kfd_topology.c | 375 cache->cacheline_size); in kfd_cache_show()
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/linux-6.3-rc2/drivers/gpu/drm/i915/ |
A D | intel_pm.c | 549 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 557 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 565 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 573 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 581 .cacheline_size = I915_FIFO_LINE_SIZE, 589 .cacheline_size = I915_FIFO_LINE_SIZE, 597 .cacheline_size = I915_FIFO_LINE_SIZE, 605 .cacheline_size = I830_FIFO_LINE_SIZE, 613 .cacheline_size = I830_FIFO_LINE_SIZE, 621 .cacheline_size = I830_FIFO_LINE_SIZE, [all …]
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/linux-6.3-rc2/drivers/scsi/ |
A D | myrb.h | 297 unsigned short cacheline_size; /* Bytes 104-105 */ member
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A D | myrs.h | 413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
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A D | myrs.c | 1575 if (ldev_info->cacheline_size) { in myrs_mode_sense() 1577 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
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/linux-6.3-rc2/drivers/pci/ |
A D | pci.c | 4459 u8 cacheline_size; in pci_set_cacheline_size() local 4466 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size() 4467 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size() 4468 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size() 4474 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size() 4475 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
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/linux-6.3-rc2/drivers/gpu/drm/i915/display/ |
A D | intel_display_types.h | 1502 u8 cacheline_size; member
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/linux-6.3-rc2/drivers/net/ethernet/broadcom/ |
A D | tg3.c | 16986 int cacheline_size; in tg3_calc_dma_bndry() local 16992 cacheline_size = 1024; in tg3_calc_dma_bndry() 16994 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry() 17034 switch (cacheline_size) { in tg3_calc_dma_bndry() 17059 switch (cacheline_size) { in tg3_calc_dma_bndry() 17076 switch (cacheline_size) { in tg3_calc_dma_bndry()
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