Searched refs:channel_readl (Results 1 – 9 of 9) sorted by relevance
| /linux-6.3-rc2/drivers/dma/dw/ |
| A D | dw.c | 34 u32 cfglo = channel_readl(dwc, CFG_LO); in dw_dma_suspend_chan()
41 u32 cfglo = channel_readl(dwc, CFG_LO); in dw_dma_resume_chan()
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| A D | core.c | 131 channel_readl(dwc, SAR), in dwc_dump_chan_regs()
132 channel_readl(dwc, DAR), in dwc_dump_chan_regs()
133 channel_readl(dwc, LLP), in dwc_dump_chan_regs()
134 channel_readl(dwc, CTL_HI), in dwc_dump_chan_regs()
135 channel_readl(dwc, CTL_LO)); in dwc_dump_chan_regs()
291 u32 ctlhi = channel_readl(dwc, CTL_HI); in dwc_get_sent()
292 u32 ctllo = channel_readl(dwc, CTL_LO); in dwc_get_sent()
306 llp = channel_readl(dwc, LLP); in dwc_scan_descriptors()
808 while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--) in dwc_chan_pause()
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| A D | idma32.c | 163 u32 cfglo = channel_readl(dwc, CFG_LO); in idma32_suspend_chan()
173 u32 cfglo = channel_readl(dwc, CFG_LO); in idma32_resume_chan()
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| A D | regs.h | 303 #define channel_readl(dwc, name) \ macro
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| /linux-6.3-rc2/drivers/dma/ |
| A D | at_hdmac.c | 286 #define channel_readl(atchan, name) \ macro
391 channel_readl(atchan, SADDR), in vdbg_dump_regs()
392 channel_readl(atchan, DADDR), in vdbg_dump_regs()
393 channel_readl(atchan, CTRLA), in vdbg_dump_regs()
394 channel_readl(atchan, CTRLB), in vdbg_dump_regs()
395 channel_readl(atchan, CFG), in vdbg_dump_regs()
396 channel_readl(atchan, DSCR)); in vdbg_dump_regs()
673 dscr = channel_readl(atchan, DSCR); in atc_get_llis_residue()
675 ctrla = channel_readl(atchan, CTRLA); in atc_get_llis_residue()
698 ctrla = channel_readl(atchan, CTRLA); in atc_get_llis_residue()
[all …]
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| A D | txx9dmac.c | 51 #define channel_readl(dc, name) \ macro
339 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
611 csr = channel_readl(dc, CSR); in txx9dmac_chan_tasklet()
629 channel_readl(dc, CSR)); in txx9dmac_chan_interrupt()
656 csr = channel_readl(dc, CSR); in txx9dmac_tasklet()
953 if (!(channel_readl(dc, CSR) & TXX9_DMA_CSR_CHNEN) && in txx9dmac_chain_dynamic()
994 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_alloc_chan_resources()
1056 BUG_ON(channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT); in txx9dmac_free_chan_resources()
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| A D | idma64.c | 350 u32 ctlhi = channel_readl(idma64c, CTL_HI); in idma64_active_desc_size()
423 cfglo = channel_readl(idma64c, CFG_LO); in idma64_chan_deactivate()
432 cfglo = channel_readl(idma64c, CFG_LO); in idma64_chan_deactivate()
440 cfglo = channel_readl(idma64c, CFG_LO); in idma64_chan_activate()
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| A D | pch_dma.c | 110 #define channel_readl(pdc, name) \ macro
752 pd->ch_regs[i].dev_addr = channel_readl(pd_chan, DEV_ADDR); in pch_dma_save_regs()
753 pd->ch_regs[i].mem_addr = channel_readl(pd_chan, MEM_ADDR); in pch_dma_save_regs()
754 pd->ch_regs[i].size = channel_readl(pd_chan, SIZE); in pch_dma_save_regs()
755 pd->ch_regs[i].next = channel_readl(pd_chan, NEXT); in pch_dma_save_regs()
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| A D | idma64.h | 162 #define channel_readl(idma64c, reg) \ macro
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