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Searched refs:chid (Results 1 – 25 of 75) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
A Dchid.c43 cid = find_first_zero_bit(chid->used, chid->nr); in nvkm_chid_get()
44 if (cid < chid->nr) { in nvkm_chid_get()
56 struct nvkm_chid *chid = container_of(kref, typeof(*chid), kref); in nvkm_chid_del() local
60 kvfree(chid->data); in nvkm_chid_del()
61 kfree(chid); in nvkm_chid_del()
69 if (!chid) in nvkm_chid_unref()
79 if (chid) in nvkm_chid_ref()
82 return chid; in nvkm_chid_ref()
96 chid->nr = nr; in nvkm_chid_new()
97 chid->mask = chid->nr - 1; in nvkm_chid_new()
[all …]
A Drunl.c185 struct nvkm_chid *chid = runl->chid; in nvkm_runl_chan_get_inst() local
191 for_each_set_bit(id, chid->used, chid->nr) { in nvkm_runl_chan_get_inst()
192 chan = chid->data[id]; in nvkm_runl_chan_get_inst()
197 spin_unlock(&chid->lock); in nvkm_runl_chan_get_inst()
209 struct nvkm_chid *chid = runl->chid; in nvkm_runl_chan_get_chid() local
214 if (!WARN_ON(id >= chid->nr)) { in nvkm_runl_chan_get_chid()
215 chan = chid->data[id]; in nvkm_runl_chan_get_chid()
219 spin_unlock(&chid->lock); in nvkm_runl_chan_get_chid()
329 nvkm_chid_unref(&runl->chid); in nvkm_runl_del()
417 if (!fifo->chid) { in nvkm_runl_new()
[all …]
A Dnv04.c49 u32 chid; in nv04_chan_stop() local
56 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & fifo->chid->mask; in nv04_chan_stop()
57 if (chid == chan->id) { in nv04_chan_stop()
329 !nv04_fifo_swmthd(device, chid, mthd, data)) { in nv04_fifo_intr_cache_error()
333 chid, chan ? chan->name : "unknown", in nv04_fifo_intr_cache_error()
377 chid, name, ho_get, dma_get, ho_put, dma_put, in nv04_fifo_intr_dma_pusher()
392 chid, name, dma_get, dma_put, state, in nv04_fifo_intr_dma_pusher()
413 u32 reassign, chid, get, sem; in nv04_fifo_intr() local
418 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & fifo->chid->mask; in nv04_fifo_intr()
422 nv04_fifo_intr_cache_error(fifo, chid, get); in nv04_fifo_intr()
[all …]
A Dnv40.c131 int chid; in nv40_ectx_bind() local
155 chid = nvkm_rd32(device, 0x003204) & (fifo->chid->nr - 1); in nv40_ectx_bind()
156 if (chid == chan->id) in nv40_ectx_bind()
221 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv40_fifo_init()
A Dbase.c181 case NV_DEVICE_HOST_CHANNELS: *data = fifo->chid ? fifo->chid->nr : 0; return 0; in nvkm_fifo_info()
223 if (!fifo->chid) { in nvkm_fifo_info()
226 *data = runl->chid->nr; in nvkm_fifo_info()
297 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, fifo->chid->nr * in nvkm_fifo_oneinit()
338 nvkm_chid_unref(&fifo->chid); in nvkm_fifo_dtor()
A Dga100.c187 u32 chid = nvkm_rd32(device, 0x040120 + (runq->id * 0x0800)) & runl->chid->mask; in ga100_runq_intr_1() local
191 RUNQ_ERROR(runq, "CTXNOTVALID chid:%d", chid); in ga100_runq_intr_1()
192 chan = nvkm_runl_chan_get_chid(runl, chid, &flags); in ga100_runq_intr_1()
226 u32 chid = nvkm_rd32(device, 0x040120 + (runq->id * 0x0800)) & runl->chid->mask; in ga100_runq_intr_0() local
231 chan = nvkm_runl_chan_get_chid(runl, chid, &flags); in ga100_runq_intr_0()
A Dgf100.c243 u8 chid; member
255 status->chid = (stat & 0x0000007f); in gf100_engn_status()
258 stat, status->busy, status->save, status->unk0, status->unk1, status->chid); in gf100_engn_status()
269 return status.chid; in gf100_engn_cxid()
318 u32 chid = nvkm_rd32(device, 0x040120 + (runq->id * 0x2000)) & runq->fifo->chid->mask; in gf100_runq_intr() local
328 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) in gf100_runq_intr()
335 chan = nvkm_chan_get_chid(&runq->fifo->engine, chid, &flags); in gf100_runq_intr()
338 runq->id, show, msg, chid, chan ? chan->inst->addr : 0, in gf100_runq_intr()
941 return nvkm_chid_new(&nvkm_chan_event, &fifo->engine.subdev, nr, 0, nr, &fifo->chid); in gf100_fifo_chid_ctor()
A Dgv100.c146 gv100_runq_intr_1_ctxnotvalid(struct nvkm_runq *runq, int chid) in gv100_runq_intr_1_ctxnotvalid() argument
153 RUNQ_ERROR(runq, "CTXNOTVALID chid:%d", chid); in gv100_runq_intr_1_ctxnotvalid()
155 chan = nvkm_chan_get_chid(&fifo->engine, chid, &flags); in gv100_runq_intr_1_ctxnotvalid()
/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/core/
A Dramht.c36 hash ^= chid << (ramht->bits - 4); in nvkm_ramht_hash()
45 co = ho = nvkm_ramht_hash(ramht, chid, handle); in nvkm_ramht_search()
47 if (ramht->data[co].chid == chid) { in nvkm_ramht_search()
61 int chid, int addr, u32 handle, u32 context) in nvkm_ramht_update() argument
68 data->chid = chid; in nvkm_ramht_update()
75 data->chid = -1; in nvkm_ramht_update()
108 int chid, int addr, u32 handle, u32 context) in nvkm_ramht_insert() argument
112 if (nvkm_ramht_search(ramht, chid, handle)) in nvkm_ramht_insert()
115 co = ho = nvkm_ramht_hash(ramht, chid, handle); in nvkm_ramht_insert()
117 if (ramht->data[co].chid < 0) { in nvkm_ramht_insert()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Dgp102.c38 int ctrl = chan->chid.ctrl; in gp102_disp_dmac_init()
39 int user = chan->chid.user; in gp102_disp_dmac_init()
148 gp102_disp_intr_error(struct nvkm_disp *disp, int chid) in gp102_disp_intr_error() argument
152 u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12)); in gp102_disp_intr_error()
153 u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12)); in gp102_disp_intr_error()
154 u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12)); in gp102_disp_intr_error()
157 chid, (mthd & 0x0000ffc), data, mthd, unkn); in gp102_disp_intr_error()
159 if (chid < ARRAY_SIZE(disp->chan)) { in gp102_disp_intr_error()
162 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR); in gp102_disp_intr_error()
169 nvkm_wr32(device, 0x61009c, (1 << chid)); in gp102_disp_intr_error()
[all …]
A Dgf119.c521 int ctrl = chan->chid.ctrl; in gf119_disp_pioc_fini()
522 int user = chan->chid.user; in gf119_disp_pioc_fini()
540 int ctrl = chan->chid.ctrl; in gf119_disp_pioc_init()
541 int user = chan->chid.user; in gf119_disp_pioc_init()
578 int ctrl = chan->chid.ctrl; in gf119_disp_dmac_fini()
579 int user = chan->chid.user; in gf119_disp_dmac_fini()
600 int ctrl = chan->chid.ctrl; in gf119_disp_dmac_init()
601 int user = chan->chid.user; in gf119_disp_dmac_init()
1111 int chid = __ffs(stat); stat &= ~(1 << chid); in gf119_disp_intr() local
1120 int chid = ffs(stat) - 1; in gf119_disp_intr() local
[all …]
A Dgv100.c342 const u32 soff = (chan->chid.ctrl - 1) * 0x04; in gv100_disp_dmac_idle()
356 chan->chid.user << 25 | 0x00000040); in gv100_disp_dmac_bind()
363 const u32 uoff = (chan->chid.ctrl - 1) * 0x1000; in gv100_disp_dmac_fini()
364 const u32 coff = chan->chid.ctrl * 0x04; in gv100_disp_dmac_fini()
376 const u32 uoff = (chan->chid.ctrl - 1) * 0x1000; in gv100_disp_dmac_init()
377 const u32 poff = chan->chid.ctrl * 0x10; in gv100_disp_dmac_init()
378 const u32 coff = chan->chid.ctrl * 0x04; in gv100_disp_dmac_init()
557 const u32 soff = (chan->chid.ctrl - 1) * 0x04; in gv100_disp_curs_idle()
579 const u32 hoff = chan->chid.ctrl * 4; in gv100_disp_curs_fini()
909 if (chid <= 32) { in gv100_disp_exception()
[all …]
A Dnv50.c537 int ctrl = chan->chid.ctrl; in nv50_disp_pioc_fini()
538 int user = chan->chid.user; in nv50_disp_pioc_fini()
556 int ctrl = chan->chid.ctrl; in nv50_disp_pioc_init()
557 int user = chan->chid.user; in nv50_disp_pioc_init()
595 chan->chid.user << 28 | chan->chid.user); in nv50_disp_dmac_bind()
603 int ctrl = chan->chid.ctrl; in nv50_disp_dmac_fini()
604 int user = chan->chid.user; in nv50_disp_dmac_fini()
625 int ctrl = chan->chid.ctrl; in nv50_disp_dmac_init()
626 int user = chan->chid.user; in nv50_disp_dmac_init()
1434 chid, mthd, data); in nv50_disp_intr_error()
[all …]
A Dchan.c178 if (disp->chan[chan->chid.user] == chan) in nvkm_disp_chan_dtor()
179 disp->chan[chan->chid.user] = NULL; in nvkm_disp_chan_dtor()
230 chan->chid.ctrl = user->ctrl + args->v0.id; in nvkm_disp_chan_new_()
231 chan->chid.user = user->user + args->v0.id; in nvkm_disp_chan_new_()
241 if (disp->chan[chan->chid.user]) { in nvkm_disp_chan_new_()
245 disp->chan[chan->chid.user] = chan; in nvkm_disp_chan_new_()
/linux-6.3-rc2/drivers/dma/qcom/
A Dgpi.c246 u8 chid; member
257 u8 chid; member
267 u8 chid; member
697 chid = gchan->chid; in gpi_send_cmd()
774 for (chid = 0; chid < MAX_CHANNELS_PER_GPII; chid++) { in gpi_process_ch_ctrl_irq()
985 chid = imed_event->chid; in gpi_process_imed_data_event()
1060 chid = compl_event->chid; in gpi_process_xfer_compl_event()
1105 chid = gpi_event->xfer_compl_event.chid; in gpi_process_events()
1183 u32 chid = gpi_event->xfer_compl_event.chid; in gpi_mark_stale_events() local
1185 if (chid == gchan->chid) in gpi_mark_stale_events()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/nouveau/include/nvkm/core/
A Dramht.h9 int chid; member
26 int chid, int addr, u32 handle, u32 context);
29 nvkm_ramht_search(struct nvkm_ramht *, int chid, u32 handle);
/linux-6.3-rc2/drivers/bus/mhi/
A Dcommon.h126 #define MHI_TRE_CMD_RESET_DWORD1(chid) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \ argument
133 #define MHI_TRE_CMD_STOP_DWORD1(chid) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \ argument
140 #define MHI_TRE_CMD_START_DWORD1(chid) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \ argument
152 #define MHI_TRE_EV_DWORD1(chid, type) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \ argument
/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/engine/gr/
A Dnv20.c24 nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4); in nv20_gr_chan_init()
36 int chid = -1; in nv20_gr_chan_fini() local
40 chid = (nvkm_rd32(device, 0x400148) & 0x1f000000) >> 24; in nv20_gr_chan_fini()
41 if (chan->chid == chid) { in nv20_gr_chan_fini()
54 nvkm_wo32(gr->ctxtab, chan->chid * 4, 0x00000000); in nv20_gr_chan_fini()
86 chan->chid = fifoch->id; in nv20_gr_chan_new()
96 nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); in nv20_gr_chan_new()
190 u32 chid = (addr & 0x01f00000) >> 20; in nv20_gr_intr() local
199 chan = nvkm_chan_get_chid(&gr->base.engine, chid, &flags); in nv20_gr_intr()
211 show, msg, nsource, src, nstatus, sta, chid, in nv20_gr_intr()
A Dnv10.c402 int chid; member
553 if (chid < ARRAY_SIZE(gr->chan)) in nv10_gr_channel()
554 chan = gr->chan[chid]; in nv10_gr_channel()
937 int chid; in nv10_gr_context_switch() local
948 next = gr->chan[chid]; in nv10_gr_context_switch()
950 nv10_gr_load_context(next, chid); in nv10_gr_context_switch()
978 gr->chan[chan->chid] = NULL; in nv10_gr_chan_dtor()
1014 chan->chid = fifoch->id; in nv10_gr_chan_new()
1039 gr->chan[chan->chid] = chan; in nv10_gr_chan_new()
1090 u32 chid = (addr & 0x01f00000) >> 20; in nv10_gr_intr() local
[all …]
A Dnv04.c362 int chid; member
1078 if (chid < ARRAY_SIZE(gr->chan)) in nv04_gr_channel()
1079 chan = gr->chan[chid]; in nv04_gr_channel()
1119 int chid; in nv04_gr_context_switch() local
1130 next = gr->chan[chid]; in nv04_gr_context_switch()
1132 nv04_gr_load_context(next, chid); in nv04_gr_context_switch()
1155 gr->chan[chan->chid] = NULL; in nv04_gr_chan_dtor()
1195 chan->chid = fifoch->id; in nv04_gr_chan_new()
1201 gr->chan[chan->chid] = chan; in nv04_gr_chan_new()
1281 u32 chid = (addr & 0x0f000000) >> 24; in nv04_gr_intr() local
[all …]
A Dnv50.c396 int chid, u64 inst, const char *name) in nv50_gr_trap_handler() argument
436 chid, inst, name, subc, class, mthd, in nv50_gr_trap_handler()
461 "40084c %08x\n", chid, inst, name, in nv50_gr_trap_handler()
638 int chid = -1; in nv50_gr_intr() local
643 chid = chan->id; in nv50_gr_intr()
655 if (!nv50_gr_trap_handler(gr, show, chid, (u64)inst << 12, name)) in nv50_gr_intr()
668 stat, msg, chid, (u64)inst << 12, name, in nv50_gr_intr()
A Dnv2a.c32 chan->chid = fifoch->id; in nv2a_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); in nv2a_gr_chan_new()
A Dnv25.c32 chan->chid = fifoch->id; in nv25_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv25_gr_chan_new()
/linux-6.3-rc2/Documentation/ABI/testing/
A Dsysfs-platform-hidma1 What: /sys/devices/platform/hidma-*/chid
2 /sys/devices/platform/QCOM8061:*/chid
/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/engine/sw/
A Dbase.c30 nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data) in nvkm_sw_mthd() argument
38 if (chan->fifo->id == chid) { in nvkm_sw_mthd()

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