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Searched refs:clk_level_info (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_pp_smu.c239 struct dm_pp_clock_levels_with_latency *clk_level_info, in pp_to_dc_clock_levels_with_latency() argument
250 clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS; in pp_to_dc_clock_levels_with_latency()
252 clk_level_info->num_levels = pp_clks->num_levels; in pp_to_dc_clock_levels_with_latency()
257 for (i = 0; i < clk_level_info->num_levels; i++) { in pp_to_dc_clock_levels_with_latency()
266 struct dm_pp_clock_levels_with_voltage *clk_level_info, in pp_to_dc_clock_levels_with_voltage() argument
277 clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS; in pp_to_dc_clock_levels_with_voltage()
279 clk_level_info->num_levels = pp_clks->num_levels; in pp_to_dc_clock_levels_with_voltage()
284 for (i = 0; i < clk_level_info->num_levels; i++) { in pp_to_dc_clock_levels_with_voltage()
361 struct dm_pp_clock_levels_with_latency *clk_level_info) in dm_pp_get_clock_levels_by_type_with_latency() argument
373 pp_to_dc_clock_levels_with_latency(&pp_clks, clk_level_info, clk_type); in dm_pp_get_clock_levels_by_type_with_latency()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/
A Ddm_services.h192 struct dm_pp_clock_levels *clk_level_info);
197 struct dm_pp_clock_levels_with_latency *clk_level_info);
202 struct dm_pp_clock_levels_with_voltage *clk_level_info);

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