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Searched refs:clk_mul (Results 1 – 5 of 5) sorted by relevance

/linux-6.3-rc2/drivers/mmc/host/
A Dsdhci-of-at91.c173 unsigned int clk_base, clk_mul; in sdhci_at91_set_clks_presets() local
188 clk_mul = gck_rate / clk_base_rate - 1; in sdhci_at91_set_clks_presets()
193 caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); in sdhci_at91_set_clks_presets()
202 clk_mul, gck_rate, clk_base_rate); in sdhci_at91_set_clks_presets()
A Dsdhci.c1890 int real_div = div, clk_mul = 1; in sdhci_calc_clk() local
1901 if (host->clk_mul && in sdhci_calc_clk()
1905 clk_mul = host->clk_mul; in sdhci_calc_clk()
1916 if (host->clk_mul) { in sdhci_calc_clk()
1918 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1929 clk_mul = host->clk_mul; in sdhci_calc_clk()
1940 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
4409 if (host->clk_mul) in sdhci_setup_host()
4410 host->clk_mul += 1; in sdhci_setup_host()
4420 if (host->clk_mul) in sdhci_setup_host()
[all …]
A Dsdhci.h523 unsigned int clk_mul; /* Clock Muliplier value */ member
/linux-6.3-rc2/drivers/clk/
A Dclk-versaclock5.c194 struct clk_hw clk_mul; member
292 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_recalc_rate()
319 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_set_rate()
1050 vc5->clk_mul.init = &init; in vc5_probe()
1051 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul); in vc5_probe()
1064 parent_names[0] = clk_hw_get_name(&vc5->clk_mul); in vc5_probe()
/linux-6.3-rc2/drivers/iio/adc/
A Drcar-gyroadc.c78 const unsigned long clk_mul = in rcar_gyroadc_hw_init() local
80 unsigned long clk_len = clk_mhz * clk_mul; in rcar_gyroadc_hw_init()

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