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/linux-6.3-rc2/drivers/clk/imx/
A Dclk-imx8ulp.c149 struct clk_hw **clks; in imx8ulp_clk_cgc1_init() local
158 clks = clk_data->hws; in imx8ulp_clk_cgc1_init()
224 imx_check_clk_hws(clks, clk_data->num); in imx8ulp_clk_cgc1_init()
233 struct clk_hw **clks; in imx8ulp_clk_cgc2_init() local
242 clks = clk_data->hws; in imx8ulp_clk_cgc2_init()
315 struct clk_hw **clks; in imx8ulp_clk_pcc3_init() local
325 clks = clk_data->hws; in imx8ulp_clk_pcc3_init()
398 struct clk_hw **clks; in imx8ulp_clk_pcc4_init() local
408 clks = clk_data->hws; in imx8ulp_clk_pcc4_init()
453 struct clk_hw **clks; in imx8ulp_clk_pcc5_init() local
[all …]
/linux-6.3-rc2/drivers/clk/hisilicon/
A Dclk.c107 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_fixed_rate()
130 clks[i].flags, clks[i].mult, in hisi_clk_register_fixed_factor()
137 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_fixed_factor()
162 clks[i].num_parents, clks[i].flags, in hisi_clk_register_mux()
163 base + clks[i].offset, clks[i].shift, in hisi_clk_register_mux()
175 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_mux()
205 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_phase()
224 clks[i].shift, clks[i].width, in hisi_clk_register_divider()
237 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_divider()
274 data->clk_data.clks[clks[i].id] = clk; in hisi_clk_register_gate()
[all …]
/linux-6.3-rc2/drivers/clk/mmp/
A Dclk.c36 clks[i].flags, in mmp_register_fixed_rate_clks()
43 if (clks[i].id) in mmp_register_fixed_rate_clks()
58 clks[i].flags, clks[i].mult, in mmp_register_fixed_factor_clks()
59 clks[i].div); in mmp_register_fixed_factor_clks()
65 if (clks[i].id) in mmp_register_fixed_factor_clks()
80 clks[i].flags, in mmp_register_general_gate_clks()
91 if (clks[i].id) in mmp_register_general_gate_clks()
108 clks[i].mask, in mmp_register_gate_clks()
119 if (clks[i].id) in mmp_register_gate_clks()
147 if (clks[i].id) in mmp_register_mux_clks()
[all …]
/linux-6.3-rc2/drivers/clk/mxs/
A Dclk-imx28.c145 static struct clk *clks[clk_max]; variable
167 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); in mx28_clocks_init()
219 clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); in mx28_clocks_init()
223 clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); in mx28_clocks_init()
224 clks[fec] = mxs_clk_gate("fec", "hbus", ENET, 30); in mx28_clocks_init()
233 for (i = 0; i < ARRAY_SIZE(clks); i++) in mx28_clocks_init()
234 if (IS_ERR(clks[i])) { in mx28_clocks_init()
236 i, PTR_ERR(clks[i])); in mx28_clocks_init()
240 clk_data.clks = clks; in mx28_clocks_init()
241 clk_data.clk_num = ARRAY_SIZE(clks); in mx28_clocks_init()
[all …]
A Dclk-imx23.c90 static struct clk *clks[clk_max]; variable
112 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); in mx23_clocks_init()
117 clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3); in mx23_clocks_init()
145 clks[ssp] = mxs_clk_gate("ssp", "ssp_div", SSP, 31); in mx23_clocks_init()
148 clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); in mx23_clocks_init()
155 for (i = 0; i < ARRAY_SIZE(clks); i++) in mx23_clocks_init()
156 if (IS_ERR(clks[i])) { in mx23_clocks_init()
158 i, PTR_ERR(clks[i])); in mx23_clocks_init()
162 clk_data.clks = clks; in mx23_clocks_init()
163 clk_data.clk_num = ARRAY_SIZE(clks); in mx23_clocks_init()
[all …]
/linux-6.3-rc2/drivers/clk/
A Dclk-bulk.c22 clks[i].id = NULL; in of_clk_bulk_get()
23 clks[i].clk = NULL; in of_clk_bulk_get()
33 clks[i].clk = NULL; in of_clk_bulk_get()
41 clk_bulk_put(i, clks); in of_clk_bulk_get()
67 *clks = clk_bulk; in of_clk_bulk_get_all()
88 clks[i].clk = NULL; in __clk_bulk_get()
91 clks[i].clk = clk_get(dev, clks[i].id); in __clk_bulk_get()
94 clks[i].clk = NULL; in __clk_bulk_get()
101 clks[i].id); in __clk_bulk_get()
135 kfree(clks); in clk_bulk_put_all()
[all …]
/linux-6.3-rc2/arch/powerpc/platforms/512x/
A Dclock-commonclk.c403 for (i = 0; i < ARRAY_SIZE(clks); i++) in mpc512x_clk_preset_data()
404 clks[i] = ERR_PTR(-ENODEV); in mpc512x_clk_preset_data()
650 div = clk_get_rate(clks[MPC512x_CLK_SYS]); in mpc512x_clk_setup_mclk()
651 div /= clk_get_rate(clks[MPC512x_CLK_IPS]); in mpc512x_clk_setup_mclk()
689 clks[clks_idx_pub] = mpc512x_clk_muxed( in mpc512x_clk_setup_mclk()
695 clks[clks_idx_pub] = mpc512x_clk_factor( in mpc512x_clk_setup_mclk()
837 clks[MPC512x_CLK_PCI] = mpc512x_clk_gated( in mpc512x_clk_setup_clock_tree()
850 clks[MPC512x_CLK_AXE] = mpc512x_clk_gated( in mpc512x_clk_setup_clock_tree()
877 clks[MPC512x_CLK_MBX] = mpc512x_clk_gated( in mpc512x_clk_setup_clock_tree()
942 clk_data.clks = clks; in mpc5121_clk_register_of_provider()
[all …]
/linux-6.3-rc2/drivers/clk/axis/
A Dclk-artpec6.c43 struct clk **clks; in of_artpec6_clkctrl_setup() local
56 clks = clkdata->clk_table; in of_artpec6_clkctrl_setup()
85 clks[ARTPEC6_CLK_CPU] = in of_artpec6_clkctrl_setup()
98 clks[ARTPEC6_CLK_SPI_PCLK] = in of_artpec6_clkctrl_setup()
104 clks[ARTPEC6_CLK_DBG_PCLK] = in of_artpec6_clkctrl_setup()
160 clks[ARTPEC6_CLK_PTP_REF] = in artpec6_clkctrl_probe()
163 clks[ARTPEC6_CLK_SD_PCLK] = in artpec6_clkctrl_probe()
204 clks[ARTPEC6_CLK_I2C] = in artpec6_clkctrl_probe()
215 if (IS_ERR(clks[i]) && PTR_ERR(clks[i]) != -EPROBE_DEFER) { in artpec6_clkctrl_probe()
218 i, PTR_ERR(clks[i])); in artpec6_clkctrl_probe()
[all …]
/linux-6.3-rc2/arch/arm/boot/dts/
A Dimx27.dtsi114 <&clks IMX27_CLK_PER1_GATE>;
123 <&clks IMX27_CLK_PER1_GATE>;
132 <&clks IMX27_CLK_PER1_GATE>;
142 <&clks IMX27_CLK_PER1_GATE>;
175 <&clks IMX27_CLK_PER1_GATE>;
185 <&clks IMX27_CLK_PER1_GATE>;
195 <&clks IMX27_CLK_PER1_GATE>;
490 <&clks IMX27_CLK_USB_DIV>;
502 <&clks IMX27_CLK_USB_DIV>;
515 <&clks IMX27_CLK_USB_DIV>;
[all …]
A Dimx6ul.dtsi83 <&clks IMX6UL_CLK_STEP>,
84 <&clks IMX6UL_CLK_PLL1_SW>,
309 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
324 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
339 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
352 <&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>,
353 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
354 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
355 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
356 <&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>,
[all …]
A Dimx6sx.dtsi86 <&clks IMX6SX_CLK_STEP>,
206 <&clks IMX6SX_CLK_GPU>,
268 <&clks 0>, <&clks 0>, <&clks 0>,
270 <&clks 0>, <&clks 0>,
405 <&clks IMX6SX_CLK_ASRC_MEM>, <&clks 0>,
406 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
407 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
408 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
409 <&clks IMX6SX_CLK_SPDIF>, <&clks 0>, <&clks 0>,
1112 <&clks 0>, <&clks 0>;
[all …]
A Dimx25.dtsi116 clocks = <&clks 75>, <&clks 75>;
125 clocks = <&clks 76>, <&clks 76>;
134 clocks = <&clks 120>, <&clks 57>;
143 clocks = <&clks 121>, <&clks 57>;
174 clocks = <&clks 78>, <&clks 78>;
216 clocks = <&clks 80>, <&clks 80>;
460 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
469 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
478 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
556 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
[all …]
A Dvfxxx.dtsi94 <&clks VF610_CLK_DMAMUX1>;
192 <&clks 0>, <&clks 0>;
205 <&clks 0>, <&clks 0>;
218 <&clks 0>, <&clks 0>;
231 <&clks 0>, <&clks 0>;
309 <&clks VF610_CLK_QSPI0>;
436 clks: ccm@4006b000 { label
621 <&clks VF610_CLK_FTM3>,
635 <&clks VF610_CLK_QSPI1>;
664 <&clks VF610_CLK_ENET>;
[all …]
A Dimx6qdl.dtsi313 clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
314 <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
315 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
316 <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_DUMMY>,
317 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
463 <&clks IMX6QDL_CLK_ASRC_MEM>, <&clks 0>,
464 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
465 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
466 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
467 <&clks IMX6QDL_CLK_ASRC>, <&clks 0>, <&clks 0>,
[all …]
A Dimx53.dtsi56 clocks = <&clks IMX5_CLK_ARM>;
147 <&clks IMX5_CLK_SATA_REF>,
148 <&clks IMX5_CLK_AHB>;
160 <&clks IMX5_CLK_IPU_DI0_GATE>,
221 clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
244 <&clks IMX5_CLK_DUMMY>,
256 <&clks IMX5_CLK_DUMMY>,
309 <&clks IMX5_CLK_DUMMY>,
321 <&clks IMX5_CLK_DUMMY>,
598 clks: ccm@53fd4000{ label
[all …]
A Dimx51.dtsi138 clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
149 <&clks IMX5_CLK_IPU_DI0_GATE>,
196 <&clks IMX5_CLK_DUMMY>,
207 <&clks IMX5_CLK_DUMMY>,
258 <&clks IMX5_CLK_DUMMY>,
270 <&clks IMX5_CLK_DUMMY>,
458 clks: ccm@73fd4000{ label
515 <&clks IMX5_CLK_AHB>;
636 <&clks IMX5_CLK_FEC_GATE>,
637 <&clks IMX5_CLK_FEC_GATE>;
[all …]
A Dimx7s.dtsi77 clocks = <&clks IMX7D_CLK_ARM>;
461 <&clks IMX7D_GPT1_ROOT_CLK>;
470 <&clks IMX7D_GPT2_ROOT_CLK>;
480 <&clks IMX7D_GPT3_ROOT_CLK>;
805 <&clks IMX7D_CLK_DUMMY>;
948 <&clks IMX7D_CLK_DUMMY>,
949 <&clks IMX7D_CLK_DUMMY>;
963 <&clks IMX7D_CLK_DUMMY>,
964 <&clks IMX7D_CLK_DUMMY>;
978 <&clks IMX7D_CLK_DUMMY>,
[all …]
A Dimx6sll.dtsi70 <&clks IMX6SLL_CLK_STEP>,
71 <&clks IMX6SLL_CLK_PLL1_SW>,
72 <&clks IMX6SLL_CLK_PLL1_SYS>;
163 <&clks IMX6SLL_CLK_OSC>,
168 <&clks IMX6SLL_CLK_IPG>,
171 <&clks IMX6SLL_CLK_SPBA>;
325 <&clks IMX6SLL_CLK_PWM1>;
335 <&clks IMX6SLL_CLK_PWM2>;
345 <&clks IMX6SLL_CLK_PWM3>;
355 <&clks IMX6SLL_CLK_PWM4>;
[all …]
A Dimx35.dtsi101 clocks = <&clks 9>, <&clks 70>;
110 clocks = <&clks 9>, <&clks 71>;
145 clocks = <&clks 35 &clks 35>;
175 clocks = <&clks 9>, <&clks 72>;
187 clocks = <&clks 36 &clks 36>;
195 clocks = <&clks 46>, <&clks 8>;
238 clocks = <&clks 9>, <&clks 8>, <&clks 43>;
247 clocks = <&clks 9>, <&clks 8>, <&clks 44>;
256 clocks = <&clks 9>, <&clks 8>, <&clks 45>;
334 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
[all …]
A Dimx50.dtsi123 <&clks IMX5_CLK_DUMMY>,
135 <&clks IMX5_CLK_DUMMY>,
184 <&clks IMX5_CLK_DUMMY>,
196 <&clks IMX5_CLK_DUMMY>,
274 clocks = <&clks IMX5_CLK_DUMMY>;
282 <&clks IMX5_CLK_GPT_HF_GATE>;
296 <&clks IMX5_CLK_PWM1_HF_GATE>;
338 clks: ccm@53fd4000{ label
429 <&clks IMX5_CLK_AHB>;
492 <&clks IMX5_CLK_FEC_GATE>,
[all …]
/linux-6.3-rc2/drivers/clk/socfpga/
A Dclk-gate-s10.c147 if (clks->div_reg) in s10_register_gate()
152 socfpga_clk->width = clks->div_width; in s10_register_gate()
155 if (clks->bypass_reg) in s10_register_gate()
161 if (streq(clks->name, "cs_pdbg_clk")) in s10_register_gate()
166 init.name = clks->name; in s10_register_gate()
167 init.flags = clks->flags; in s10_register_gate()
169 init.num_parents = clks->num_parents; in s10_register_gate()
205 if (clks->div_reg) in agilex_register_gate()
213 if (clks->bypass_reg) in agilex_register_gate()
224 init.name = clks->name; in agilex_register_gate()
[all …]
A Dclk-periph-s10.c107 const char *name = clks->name; in s10_register_periph()
119 init.flags = clks->flags; in s10_register_periph()
121 init.num_parents = clks->num_parents; in s10_register_periph()
143 const char *name = clks->name; in n5x_register_periph()
152 periph_clk->shift = clks->shift; in n5x_register_periph()
156 init.flags = clks->flags; in n5x_register_periph()
158 init.num_parents = clks->num_parents; in n5x_register_periph()
178 const char *name = clks->name; in s10_register_cnt_periph()
186 if (clks->offset) in s10_register_cnt_periph()
191 if (clks->bypass_reg) in s10_register_cnt_periph()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.c136 if (clk_mgr->base.clks.dppclk_khz == 0 || clk_mgr->base.clks.dispclk_khz == 0) in dcn20_update_clocks_update_dentist()
237 if (clk_mgr_base->clks.dispclk_khz == 0 || in dcn2_update_clocks()
284 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; in dcn2_update_clocks()
339 clk_mgr_base->clks.dispclk_khz / 1000 / 7); in dcn2_update_clocks()
379 clk_mgr->clks.fclk_khz = fclk_adj; in dcn2_update_clocks_fpga()
390 if (clk_mgr->clks.fclk_khz > clk_mgr->clks.dppclk_khz) in dcn2_update_clocks_fpga()
391 clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz; in dcn2_update_clocks_fpga()
392 if (clk_mgr->clks.dppclk_khz > clk_mgr->clks.fclk_khz) in dcn2_update_clocks_fpga()
393 clk_mgr->clks.fclk_khz = clk_mgr->clks.dppclk_khz; in dcn2_update_clocks_fpga()
399 clk_mgr->clks.dtbclk_en = false; in dcn2_update_clocks_fpga()
[all …]
/linux-6.3-rc2/arch/powerpc/boot/dts/
A Dmpc5121.dtsi51 <&clks MPC512x_CLK_MBX_3D>,
52 <&clks MPC512x_CLK_MBX>;
134 clks: clock@f00 { label
160 <&clks MPC512x_CLK_IPS>,
161 <&clks MPC512x_CLK_SYS>,
162 <&clks MPC512x_CLK_REF>,
172 <&clks MPC512x_CLK_IPS>,
173 <&clks MPC512x_CLK_SYS>,
174 <&clks MPC512x_CLK_REF>,
246 <&clks MPC512x_CLK_IPS>,
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
A Ddcn201_clk_mgr.c79 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn201_init_clocks()
80 clk_mgr->clks.p_state_change_support = true; in dcn201_init_clocks()
81 clk_mgr->clks.prev_p_state_change_support = true; in dcn201_init_clocks()
82 clk_mgr->clks.max_supported_dppclk_khz = 1200000; in dcn201_init_clocks()
83 clk_mgr->clks.max_supported_dispclk_khz = 1200000; in dcn201_init_clocks()
103 if (clk_mgr_base->clks.dispclk_khz == 0 || in dcn201_update_clocks()
113 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; in dcn201_update_clocks()
120 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
127 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn201_update_clocks()
132 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; in dcn201_update_clocks()
[all …]

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