/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
A D | dcn314_fpu.c | 102 .clock_limits = { 185 dcn3_14_soc.clock_limits; in dcn314_update_bw_bounding_box_fpu() 228 clock_limits[i].state = i; in dcn314_update_bw_bounding_box_fpu() 233 clock_limits[i].dcfclk_mhz < dcn3_14_soc.clock_limits[closest_clk_lvl].dcfclk_mhz) { in dcn314_update_bw_bounding_box_fpu() 235 clock_limits[i].dcfclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dcfclk_mhz; in dcn314_update_bw_bounding_box_fpu() 250 …clock_limits[i].dram_bw_per_chan_gbps = dcn3_14_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan… in dcn314_update_bw_bounding_box_fpu() 251 clock_limits[i].dscclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn314_update_bw_bounding_box_fpu() 252 clock_limits[i].dtbclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn314_update_bw_bounding_box_fpu() 253 clock_limits[i].phyclk_d18_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn314_update_bw_bounding_box_fpu() 254 clock_limits[i].phyclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn314_update_bw_bounding_box_fpu() [all …]
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A D | display_mode_vba_314.c | 2153 v->soc.clock_limits[v->soc.num_states - 1].dispclk_mhz,
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
A D | dcn303_fpu.c | 113 .clock_limits = { 230 max_dcfclk_mhz = dcn3_03_soc.clock_limits[0].dcfclk_mhz; in dcn303_fpu_update_bw_bounding_box() 304 dcn3_03_soc.clock_limits[i].state = i; in dcn303_fpu_update_bw_bounding_box() 305 dcn3_03_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i]; in dcn303_fpu_update_bw_bounding_box() 315 dcn3_03_soc.clock_limits[i].dtbclk_mhz = dcn3_03_soc.clock_limits[i-1].dtbclk_mhz; in dcn303_fpu_update_bw_bounding_box() 319 dcn3_03_soc.clock_limits[i].socclk_mhz = dcn3_03_soc.clock_limits[i-1].socclk_mhz; in dcn303_fpu_update_bw_bounding_box() 324 dcn3_03_soc.clock_limits[i].phyclk_d18_mhz = dcn3_03_soc.clock_limits[0].phyclk_d18_mhz; in dcn303_fpu_update_bw_bounding_box() 325 dcn3_03_soc.clock_limits[i].dscclk_mhz = dcn3_03_soc.clock_limits[0].dscclk_mhz; in dcn303_fpu_update_bw_bounding_box() 330 if (dcn3_03_soc.clock_limits[i].dram_speed_mts > 1700) in dcn303_fpu_update_bw_bounding_box() 334 dcn3_03_soc.clock_limits[i].dcfclk_mhz = 100; in dcn303_fpu_update_bw_bounding_box() [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
A D | dcn302_fpu.c | 114 .clock_limits = { 234 max_dcfclk_mhz = dcn3_02_soc.clock_limits[0].dcfclk_mhz; in dcn302_fpu_update_bw_bounding_box() 238 max_dppclk_mhz = dcn3_02_soc.clock_limits[0].dppclk_mhz; in dcn302_fpu_update_bw_bounding_box() 240 max_phyclk_mhz = dcn3_02_soc.clock_limits[0].phyclk_mhz; in dcn302_fpu_update_bw_bounding_box() 309 dcn3_02_soc.clock_limits[i].state = i; in dcn302_fpu_update_bw_bounding_box() 310 dcn3_02_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i]; in dcn302_fpu_update_bw_bounding_box() 316 dcn3_02_soc.clock_limits[i].dppclk_mhz = max_dppclk_mhz; in dcn302_fpu_update_bw_bounding_box() 320 dcn3_02_soc.clock_limits[i].dtbclk_mhz = dcn3_02_soc.clock_limits[i-1].dtbclk_mhz; in dcn302_fpu_update_bw_bounding_box() 324 dcn3_02_soc.clock_limits[i].socclk_mhz = dcn3_02_soc.clock_limits[i-1].socclk_mhz; in dcn302_fpu_update_bw_bounding_box() 329 dcn3_02_soc.clock_limits[i].phyclk_d18_mhz = dcn3_02_soc.clock_limits[0].phyclk_d18_mhz; in dcn302_fpu_update_bw_bounding_box() [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
A D | dcn31_fpu.c | 122 .clock_limits = { 365 .clock_limits = { 577 memcpy(s, dcn3_1_soc.clock_limits, sizeof(dcn3_1_soc.clock_limits)); in dcn31_update_bw_bounding_box() 617 dcn3_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn31_update_bw_bounding_box() 620 dcn3_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn31_update_bw_bounding_box() 635 memcpy(dcn3_1_soc.clock_limits, s, sizeof(dcn3_1_soc.clock_limits)); in dcn31_update_bw_bounding_box() 678 dcn3_15_soc.clock_limits[i].state = i; in dcn315_update_bw_bounding_box() 693 dcn3_15_soc.clock_limits[i].dppclk_mhz = max_dppclk_mhz; in dcn315_update_bw_bounding_box() 726 memcpy(s, dcn3_16_soc.clock_limits, sizeof(dcn3_16_soc.clock_limits)); in dcn316_update_bw_bounding_box() 781 dcn3_16_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn316_update_bw_bounding_box() [all …]
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A D | display_mode_vba_31.c | 2131 v->soc.clock_limits[v->soc.num_states - 1].dispclk_mhz,
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
A D | dcn301_fpu.c | 113 .clock_limits = { 304 pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz; in calculate_wm_set_for_vlevel() 305 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel() 333 memcpy(s, dcn3_01_soc.clock_limits, sizeof(dcn3_01_soc.clock_limits)); in dcn301_update_bw_bounding_box() 358 s[i].dppclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn301_update_bw_bounding_box() 360 dcn3_01_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; in dcn301_update_bw_bounding_box() 361 s[i].dscclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn301_update_bw_bounding_box() 362 s[i].dtbclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn301_update_bw_bounding_box() 364 dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn301_update_bw_bounding_box() 372 dcn3_01_soc.clock_limits[dcn3_01_soc.num_states - 1]; in dcn301_update_bw_bounding_box() [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
A D | dcn321_fpu.c | 106 .clock_limits = { 307 max_phyclk_mhz = dcn3_21_soc.clock_limits[0].phyclk_mhz; in build_synthetic_soc_states() 581 max_dcfclk_mhz = dcn3_21_soc.clock_limits[0].dcfclk_mhz; in dcn321_update_bw_bounding_box_fpu() 585 max_dppclk_mhz = dcn3_21_soc.clock_limits[0].dppclk_mhz; in dcn321_update_bw_bounding_box_fpu() 657 dcn3_21_soc.clock_limits[i].state = i; in dcn321_update_bw_bounding_box_fpu() 658 dcn3_21_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i]; in dcn321_update_bw_bounding_box_fpu() 670 dcn3_21_soc.clock_limits[i].dtbclk_mhz = dcn3_21_soc.clock_limits[i-1].dtbclk_mhz; in dcn321_update_bw_bounding_box_fpu() 679 dcn3_21_soc.clock_limits[i].socclk_mhz = dcn3_21_soc.clock_limits[i-1].socclk_mhz; in dcn321_update_bw_bounding_box_fpu() 684 dcn3_21_soc.clock_limits[i].dram_speed_mts = dcn3_21_soc.clock_limits[i-1].dram_speed_mts; in dcn321_update_bw_bounding_box_fpu() 690 dcn3_21_soc.clock_limits[i].phyclk_d18_mhz = dcn3_21_soc.clock_limits[0].phyclk_d18_mhz; in dcn321_update_bw_bounding_box_fpu() [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
A D | dcn20_fpu.c | 220 .clock_limits = { 331 .clock_limits = { 515 .clock_limits = { 1747 memset(bb->clock_limits, 0, sizeof(bb->clock_limits)); in dcn20_update_bounding_box() 1845 if (bb->clock_limits[i-1].dcfclk_mhz != bb->clock_limits[i].dcfclk_mhz) in dcn20_cap_soc_clocks() 1849 if (bb->clock_limits[i-1].dppclk_mhz != bb->clock_limits[i].dppclk_mhz) in dcn20_cap_soc_clocks() 1853 if (bb->clock_limits[i-1].dscclk_mhz != bb->clock_limits[i].dscclk_mhz) in dcn20_cap_soc_clocks() 1857 if (bb->clock_limits[i-1].phyclk_mhz != bb->clock_limits[i].phyclk_mhz) in dcn20_cap_soc_clocks() 1859 if (bb->clock_limits[i-1].socclk_mhz != bb->clock_limits[i].socclk_mhz) in dcn20_cap_soc_clocks() 2298 memcpy(s, dcn2_1_soc.clock_limits, sizeof(dcn2_1_soc.clock_limits)); in dcn21_update_bw_bounding_box() [all …]
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A D | display_mode_vba_20.c | 1260 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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A D | display_mode_vba_20v2.c | 1320 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
A D | dcn30_fpu.c | 126 .clock_limits = { 547 dcn30_bb_max_clk->max_dcfclk_mhz = dcn3_0_soc.clock_limits[0].dcfclk_mhz; in dcn30_fpu_update_max_clk() 551 dcn30_bb_max_clk->max_dppclk_mhz = dcn3_0_soc.clock_limits[0].dppclk_mhz; in dcn30_fpu_update_max_clk() 594 dcn3_0_soc.clock_limits[i].state = i; in dcn30_fpu_update_bw_bounding_box() 595 dcn3_0_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i]; in dcn30_fpu_update_bw_bounding_box() 596 dcn3_0_soc.clock_limits[i].fabricclk_mhz = dcfclk_mhz[i]; in dcn30_fpu_update_bw_bounding_box() 597 dcn3_0_soc.clock_limits[i].dram_speed_mts = dram_speed_mts[i]; in dcn30_fpu_update_bw_bounding_box() 603 dcn3_0_soc.clock_limits[i].dtbclk_mhz = dcn3_0_soc.clock_limits[0].dtbclk_mhz; in dcn30_fpu_update_bw_bounding_box() 606 dcn3_0_soc.clock_limits[i].phyclk_d18_mhz = dcn3_0_soc.clock_limits[0].phyclk_d18_mhz; in dcn30_fpu_update_bw_bounding_box() 607 dcn3_0_soc.clock_limits[i].socclk_mhz = dcn3_0_soc.clock_limits[0].socclk_mhz; in dcn30_fpu_update_bw_bounding_box() [all …]
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A D | display_mode_vba_30.c | 1993 v->soc.clock_limits[mode_lib->soc.num_states - 1].dispclk_mhz, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
A D | dcn32_fpu.c | 108 .clock_limits = { 1918 double dcfclk = dcn3_2_soc.clock_limits[0].dcfclk_mhz; in dcn32_calculate_wm_and_dlg_fpu() 2005 dcfclk = dcn3_2_soc.clock_limits[2].dcfclk_mhz; in dcn32_calculate_wm_and_dlg_fpu() 2328 max_phyclk_mhz = dcn3_2_soc.clock_limits[0].phyclk_mhz; in build_synthetic_soc_states() 2671 dcn3_2_soc.clock_limits[i].state = i; in dcn32_update_bw_bounding_box_fpu() 2672 dcn3_2_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i]; in dcn32_update_bw_bounding_box_fpu() 2684 dcn3_2_soc.clock_limits[i].dtbclk_mhz = dcn3_2_soc.clock_limits[i-1].dtbclk_mhz; in dcn32_update_bw_bounding_box_fpu() 2693 dcn3_2_soc.clock_limits[i].socclk_mhz = dcn3_2_soc.clock_limits[i-1].socclk_mhz; in dcn32_update_bw_bounding_box_fpu() 2698 dcn3_2_soc.clock_limits[i].dram_speed_mts = dcn3_2_soc.clock_limits[i-1].dram_speed_mts; in dcn32_update_bw_bounding_box_fpu() 2704 dcn3_2_soc.clock_limits[i].phyclk_d18_mhz = dcn3_2_soc.clock_limits[0].phyclk_d18_mhz; in dcn32_update_bw_bounding_box_fpu() [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/ |
A D | display_mode_vba.c | 377 if (soc->clock_limits[i].state == mode_lib->vba.VoltageLevel) in fetch_socbb_params() 380 mode_lib->vba.DCFCLK = soc->clock_limits[i].dcfclk_mhz; in fetch_socbb_params() 381 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params() 382 mode_lib->vba.DRAMSpeed = soc->clock_limits[i].dram_speed_mts; in fetch_socbb_params() 383 mode_lib->vba.FabricClock = soc->clock_limits[i].fabricclk_mhz; in fetch_socbb_params() 395 mode_lib->vba.DCFCLKPerState[i] = soc->clock_limits[i].dcfclk_mhz; in fetch_socbb_params() 397 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params() 398 mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; in fetch_socbb_params() 401 mode_lib->vba.MaxDppclk[i] = soc->clock_limits[i].dppclk_mhz; in fetch_socbb_params() 402 mode_lib->vba.MaxDSCCLK[i] = soc->clock_limits[i].dscclk_mhz; in fetch_socbb_params() [all …]
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A D | display_mode_structs.h | 181 struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES]; member
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/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
A D | amdgpu_socbb.h | 79 struct gpu_info_voltage_scaling_v1_0 clock_limits[8]; member
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/ |
A D | dc.h | 940 struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES]; member
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn201/ |
A D | dcn201_resource.c | 140 .clock_limits = {
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
A D | display_mode_vba_21.c | 1644 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states - 1].dispclk_mhz, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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