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Searched refs:config_reg (Results 1 – 25 of 40) sorted by relevance

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/linux-6.3-rc2/drivers/spi/
A Dspi-zynq-qspi.c183 u32 config_reg; in zynq_qspi_init_hw() local
189 config_reg = 0; in zynq_qspi_init_hw()
192 config_reg |= ZYNQ_QSPI_LCFG_TWO_MEM; in zynq_qspi_init_hw()
294 u32 config_reg; in zynq_qspi_chipselect() local
300 config_reg &= ~ZYNQ_QSPI_LCFG_U_PAGE; in zynq_qspi_chipselect()
302 config_reg |= ZYNQ_QSPI_LCFG_U_PAGE; in zynq_qspi_chipselect()
310 config_reg &= ~ZYNQ_QSPI_CONFIG_PCS; in zynq_qspi_chipselect()
312 config_reg |= ZYNQ_QSPI_CONFIG_PCS; in zynq_qspi_chipselect()
336 u32 config_reg, baud_rate_val = 0; in zynq_qspi_config_op() local
358 config_reg |= ZYNQ_QSPI_CONFIG_CPHA_MASK; in zynq_qspi_config_op()
[all …]
A Dspi-zynqmp-gqspi.c358 u32 config_reg, baud_rate_val = 0; in zynqmp_qspi_init_hw() local
382 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_init_hw()
386 config_reg &= ~GQSPI_CFG_ENDIAN_MASK; in zynqmp_qspi_init_hw()
390 config_reg |= GQSPI_CFG_WP_HOLD_MASK; in zynqmp_qspi_init_hw()
395 config_reg |= GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
397 config_reg &= ~GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
400 config_reg |= GQSPI_CFG_CLK_POL_MASK; in zynqmp_qspi_init_hw()
749 u32 config_reg, genfifoentry; in zynqmp_process_dma_irq() local
850 u32 rx_bytes, rx_rem, config_reg; in zynqmp_qspi_setuprxdma() local
910 u32 config_reg; in zynqmp_qspi_write_op() local
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/linux-6.3-rc2/drivers/iio/common/ms_sensors/
A Dms_sensors_i2c.c254 u8 *config_reg) in ms_sensors_read_config_reg() argument
264 ret = i2c_master_recv(client, config_reg, 1); in ms_sensors_read_config_reg()
288 u8 config_reg; in ms_sensors_write_resolution() local
295 config_reg &= 0x7E; in ms_sensors_write_resolution()
300 config_reg); in ms_sensors_write_resolution()
319 u8 config_reg; in ms_sensors_show_battery_low() local
345 u8 config_reg; in ms_sensors_show_heater() local
373 u8 val, config_reg; in ms_sensors_write_heater() local
390 config_reg &= 0xFB; in ms_sensors_write_heater()
391 config_reg |= val << 2; in ms_sensors_write_heater()
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/linux-6.3-rc2/drivers/net/phy/
A Daquantia_main.c365 u32 config_reg; in aqr107_read_rate() local
380 config_reg = VEND1_GLOBAL_CFG_10M; in aqr107_read_rate()
384 config_reg = VEND1_GLOBAL_CFG_100M; in aqr107_read_rate()
388 config_reg = VEND1_GLOBAL_CFG_1G; in aqr107_read_rate()
392 config_reg = VEND1_GLOBAL_CFG_2_5G; in aqr107_read_rate()
396 config_reg = VEND1_GLOBAL_CFG_5G; in aqr107_read_rate()
400 config_reg = VEND1_GLOBAL_CFG_10G; in aqr107_read_rate()
407 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate()
A Dphylink.c3180 uint16_t config_reg, int speed) in phylink_decode_c37_word() argument
3190 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); in phylink_decode_c37_word()
3211 uint16_t config_reg) in phylink_decode_sgmii_word() argument
3213 if (!(config_reg & LPA_SGMII_LINK)) { in phylink_decode_sgmii_word()
3218 switch (config_reg & LPA_SGMII_SPD_MASK) { in phylink_decode_sgmii_word()
3232 if (config_reg & LPA_SGMII_FULL_DUPLEX) in phylink_decode_sgmii_word()
/linux-6.3-rc2/drivers/input/misc/
A Dmax77693-haptic.c107 unsigned int value, config_reg; in max77693_haptic_configure() local
116 config_reg = MAX77693_HAPTIC_REG_CONFIG2; in max77693_haptic_configure()
122 config_reg = MAX77843_HAP_REG_MCONFIG; in max77693_haptic_configure()
129 config_reg, value); in max77693_haptic_configure()
/linux-6.3-rc2/drivers/hwmon/
A Dmax6620.c99 static const u8 config_reg[] = { variable
171 ret = i2c_smbus_read_byte_data(client, config_reg[i]); in max6620_update_device()
449 reg = i2c_smbus_read_byte_data(client, config_reg[i]); in max6620_init_client()
456 err = i2c_smbus_write_byte_data(client, config_reg[i], data->fancfg[i]); in max6620_init_client()
/linux-6.3-rc2/drivers/clk/qcom/
A Dclk-hfpll.h17 u32 config_reg; member
A Dclk-pll.c103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
242 regmap_update_bits(regmap, pll->config_reg, mask, val); in clk_pll_configure()
A Dclk-pll.h43 u32 config_reg; member
A Dhfpll.c22 .config_reg = 0x14,
A Da53-pll.c113 pll->config_reg = 0x14; in qcom_a53pll_probe()
A Dgcc-ipq806x.c36 .config_reg = 0x30d4,
65 .config_reg = 0x3174,
94 .config_reg = 0x3154,
124 .config_reg = 0x3204,
150 .config_reg = 0x3244,
176 .config_reg = 0x3304,
201 .config_reg = 0x31d4,
246 .config_reg = 0x31b4,
265 .config_reg = 0x3194,
A Dgcc-msm8960.c32 .config_reg = 0x3174,
63 .config_reg = 0x3154,
95 .config_reg = 0x3204,
123 .config_reg = 0x3244,
137 .config_reg = 0x3304,
165 .config_reg = 0x3284,
193 .config_reg = 0x32c4,
221 .config_reg = 0x3304,
235 .config_reg = 0x3404,
262 .config_reg = 0x31d4,
A Dclk-hfpll.c31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
A Dgcc-msm8939.c57 .config_reg = 0x21010,
88 .config_reg = 0x20010,
119 .config_reg = 0x4a010,
150 .config_reg = 0x23010,
181 .config_reg = 0x22010,
228 .config_reg = 0x24010,
274 .config_reg = 0x25010,
305 .config_reg = 0x37010,
A Dgcc-mdm9615.c44 .config_reg = 0x30d4,
82 .config_reg = 0x3154,
109 .config_reg = 0x31d4,
A Dlcc-ipq806x.c31 .config_reg = 0x14,
A Dlcc-msm8960.c30 .config_reg = 0x14,
A Dmmcc-apq8084.c47 .config_reg = 0x0014,
78 .config_reg = 0x0050,
109 .config_reg = 0x4110,
126 .config_reg = 0x0090,
144 .config_reg = 0x00b0,
A Dlcc-mdm9615.c32 .config_reg = 0x14,
A Dmmcc-msm8974.c49 .config_reg = 0x0014,
80 .config_reg = 0x0050,
111 .config_reg = 0x4110,
128 .config_reg = 0x0090,
A Dgcc-msm8976.c59 .config_reg = 0x21014,
92 .config_reg = 0x4a014,
128 .config_reg = 0x22010,
176 .config_reg = 0x24018,
208 .config_reg = 0x37014,
/linux-6.3-rc2/drivers/pinctrl/renesas/
A Dcore.c253 const struct pinmux_cfg_reg *config_reg = in sh_pfc_get_config_reg() local
255 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
256 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
272 curr_width = abs(config_reg->var_field_width[m]); in sh_pfc_get_config_reg()
273 if (config_reg->var_field_width[m] < 0) in sh_pfc_get_config_reg()
279 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
280 *crp = config_reg; in sh_pfc_get_config_reg()
/linux-6.3-rc2/drivers/i2c/busses/
A Di2c-mlxbf.c1419 u32 config_reg; in mlxbf_i2c_init_master() local
1456 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1457 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1458 config_reg); in mlxbf_i2c_init_master()
1459 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1461 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1462 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1463 config_reg); in mlxbf_i2c_init_master()
1464 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()

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