Searched refs:control_value (Results 1 – 4 of 4) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/hisilicon/hibmc/ |
| A D | hibmc_drm_drv.c | 134 u32 control_value = 0; in hibmc_set_power_mode() local
144 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL); in hibmc_set_power_mode()
145 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK | in hibmc_set_power_mode()
147 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode); in hibmc_set_power_mode()
148 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input); in hibmc_set_power_mode()
149 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL); in hibmc_set_power_mode()
|
| /linux-6.3-rc2/drivers/mmc/host/ |
| A D | sdhci-pci-gli.c | 196 u32 control_value; in gli_set_9750() local
206 control_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
245 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1; in gli_set_9750()
246 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2; in gli_set_9750()
247 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1, in gli_set_9750()
261 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN; in gli_set_9750()
262 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN, in gli_set_9750()
264 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
270 control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN; in gli_set_9750()
271 control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN, in gli_set_9750()
[all …]
|
| /linux-6.3-rc2/drivers/gpu/drm/i915/gt/ |
| A D | intel_mocs.c | 17 u32 control_value; member
78 .control_value = __control_value, \
544 return table->table[index].control_value; in get_entry_control()
545 return table->table[table->unused_entries_index].control_value; in get_entry_control()
|
| /linux-6.3-rc2/drivers/net/ethernet/qlogic/netxen/ |
| A D | netxen_nic.h | 1421 u32 control_value; member
1496 u32 control_value; member
|
Completed in 25 milliseconds