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Searched refs:csr_addr (Results 1 – 13 of 13) sorted by relevance

/linux-6.3-rc2/arch/mips/include/asm/octeon/
A Dcvmx.h266 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() argument
268 cvmx_write64(csr_addr, val); in cvmx_write_csr()
276 if (((csr_addr >> 40) & 0x7ffff) == (0x118)) in cvmx_write_csr()
282 cvmx_write_csr((__force uint64_t)csr_addr, val); in cvmx_writeq_csr()
291 static inline uint64_t cvmx_read_csr(uint64_t csr_addr) in cvmx_read_csr() argument
293 uint64_t val = cvmx_read64(csr_addr); in cvmx_read_csr()
297 static inline uint64_t cvmx_readq_csr(void __iomem *csr_addr) in cvmx_readq_csr() argument
299 return cvmx_read_csr((__force uint64_t) csr_addr); in cvmx_readq_csr()
318 addr.u64 = csr_addr; in cvmx_read_csr_async()
376 if (((csr_addr >> 40) & 0x7ffff) == (0x118)) in cvmx_write_csr_node()
[all …]
A Docteon-model.h314 static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
/linux-6.3-rc2/drivers/crypto/qat/qat_common/
A Dadf_transport.c104 csr_ops->write_csr_ring_tail(ring->bank->csr_addr, in adf_send_message()
129 csr_ops->write_csr_ring_head(ring->bank->csr_addr, in adf_handle_response()
141 csr_ops->write_csr_ring_config(ring->bank->csr_addr, in adf_configure_tx_ring()
155 csr_ops->write_csr_ring_config(ring->bank->csr_addr, in adf_configure_rx_ring()
196 csr_ops->write_csr_ring_base(ring->bank->csr_addr, in adf_init_ring()
333 empty_rings = csr_ops->read_csr_e_stat(bank->csr_addr, in adf_ring_response_handler()
386 u32 bank_num, void __iomem *csr_addr) in adf_init_bank() argument
400 bank->csr_addr = csr_addr; in adf_init_bank()
450 csr_ops->write_csr_int_srcsel(csr_addr, bank_num); in adf_init_bank()
478 void __iomem *csr_addr; in adf_init_etr_data() local
[all …]
A Dadf_hw_arbiter.c10 #define WRITE_CSR_ARB_SARCONFIG(csr_addr, arb_offset, index, value) \ argument
11 ADF_CSR_WR(csr_addr, (arb_offset) + \
14 #define WRITE_CSR_ARB_WT2SAM(csr_addr, arb_offset, wt_offset, index, value) \ argument
15 ADF_CSR_WR(csr_addr, ((arb_offset) + (wt_offset)) + \
21 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb()
69 csr_ops->write_csr_ring_srv_arb_en(ring->bank->csr_addr, in adf_update_ring_arb()
89 csr = accel_dev->transport->banks[0].csr_addr; in adf_exit_arb()
A Dadf_gen2_hw_data.h112 #define WRITE_CSR_RING_SRV_ARB_EN(csr_addr, index, value) \ argument
113 ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \
A Dadf_transport_debug.c46 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
156 void __iomem *csr = bank->csr_addr; in adf_bank_show()
A Dadf_transport_internal.h34 void __iomem *csr_addr; member
A Dadf_vf_isr.c170 csr_ops->write_csr_int_flag_and_col(bank->csr_addr, in adf_isr()
A Dqat_hal.c444 void __iomem *csr_addr = in qat_hal_init_esram() local
453 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
457 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
459 ADF_CSR_WR(csr_addr, 0, csr_val); in qat_hal_init_esram()
463 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
A Dadf_isr.c52 csr_ops->write_csr_int_flag_and_col(bank->csr_addr, bank->bank_number, in adf_msix_isr_bundle()
/linux-6.3-rc2/drivers/net/ethernet/huawei/hinic/
A Dhinic_hw_dev.h543 u32 csr_addr; member
A Dhinic_devlink.c436 err = devlink_fmsg_u32_pair_put(fmsg, "csr_addr", event->event.phy_fault.csr_addr); in fault_report_show()
/linux-6.3-rc2/drivers/staging/octeon/
A Docteon-stubs.h1233 static inline uint64_t cvmx_read_csr(uint64_t csr_addr) in cvmx_read_csr() argument
1238 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() argument

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