Searched refs:cur_lock (Results 1 – 5 of 5) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | radeon_cursor.c | 36 uint32_t cur_lock; in radeon_lock_cursor() local
41 cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
43 cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
46 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
48 cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
50 cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
51 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
53 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); in radeon_lock_cursor()
55 cur_lock |= RADEON_CUR_LOCK; in radeon_lock_cursor()
57 cur_lock &= ~RADEON_CUR_LOCK; in radeon_lock_cursor()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v10_0.c | 2288 uint32_t cur_lock; in dce_v10_0_lock_cursor() local
2290 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v10_0_lock_cursor()
2292 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1); in dce_v10_0_lock_cursor()
2294 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0); in dce_v10_0_lock_cursor()
2295 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v10_0_lock_cursor()
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| A D | dce_v11_0.c | 2364 uint32_t cur_lock; in dce_v11_0_lock_cursor() local
2366 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v11_0_lock_cursor()
2368 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1); in dce_v11_0_lock_cursor()
2370 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0); in dce_v11_0_lock_cursor()
2371 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v11_0_lock_cursor()
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| A D | dce_v6_0.c | 2183 uint32_t cur_lock; in dce_v6_0_lock_cursor() local
2185 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v6_0_lock_cursor()
2187 cur_lock |= CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK; in dce_v6_0_lock_cursor()
2189 cur_lock &= ~CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK; in dce_v6_0_lock_cursor()
2190 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v6_0_lock_cursor()
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| A D | dce_v8_0.c | 2191 uint32_t cur_lock; in dce_v8_0_lock_cursor() local
2193 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v8_0_lock_cursor()
2195 cur_lock |= CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK; in dce_v8_0_lock_cursor()
2197 cur_lock &= ~CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK; in dce_v8_0_lock_cursor()
2198 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v8_0_lock_cursor()
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