Searched refs:cw0 (Results 1 – 10 of 10) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_dcn32.c | 146 const struct dmub_window *cw0, in dmub_dcn32_backdoor_load() argument
156 dmub_dcn32_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn32_backdoor_load()
160 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn32_backdoor_load()
162 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn32_backdoor_load()
179 const struct dmub_window *cw0, in dmub_dcn32_backdoor_load_zfb_mode() argument
186 offset = cw0->offset; in dmub_dcn32_backdoor_load_zfb_mode()
190 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn32_backdoor_load_zfb_mode()
192 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn32_backdoor_load_zfb_mode()
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| A D | dmub_dcn30.c | 88 const struct dmub_window *cw0, in dmub_dcn30_backdoor_load() argument
100 dmub_dcn30_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn30_backdoor_load()
104 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn30_backdoor_load()
106 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn30_backdoor_load()
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| A D | dmub_dcn30.h | 38 const struct dmub_window *cw0,
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| A D | dmub_dcn20.c | 155 const struct dmub_window *cw0, in dmub_dcn20_backdoor_load() argument
167 dmub_dcn20_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn20_backdoor_load()
171 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn20_backdoor_load()
173 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn20_backdoor_load()
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| A D | dmub_dcn31.c | 153 const struct dmub_window *cw0, in dmub_dcn31_backdoor_load() argument
163 dmub_dcn31_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn31_backdoor_load()
167 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn31_backdoor_load()
169 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn31_backdoor_load()
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| A D | dmub_srv.c | 516 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; in dmub_srv_hw_init() local
538 cw0.offset.quad_part = inst_fb->gpu_addr; in dmub_srv_hw_init()
539 cw0.region.base = DMUB_CW0_BASE; in dmub_srv_hw_init()
540 cw0.region.top = cw0.region.base + inst_fb->size - 1; in dmub_srv_hw_init()
558 dmub->hw_funcs.backdoor_load_zfb_mode(dmub, &cw0, &cw1); in dmub_srv_hw_init()
560 dmub->hw_funcs.backdoor_load(dmub, &cw0, &cw1); in dmub_srv_hw_init()
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| A D | dmub_dcn32.h | 192 const struct dmub_window *cw0,
196 const struct dmub_window *cw0,
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| A D | dmub_dcn20.h | 192 const struct dmub_window *cw0,
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| A D | dmub_dcn31.h | 194 const struct dmub_window *cw0,
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dmub/ |
| A D | dmub_srv.h | 325 const struct dmub_window *cw0,
329 const struct dmub_window *cw0,
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