Searched refs:ddrclk (Results 1 – 4 of 4) sorted by relevance
| /linux-6.3-rc2/drivers/clk/rockchip/ |
| A D | clk-ddr.c | 76 val = readl(ddrclk->reg_base + in rockchip_ddrclk_get_parent()
77 ddrclk->mux_offset) >> ddrclk->mux_shift; in rockchip_ddrclk_get_parent()
102 ddrclk = kzalloc(sizeof(*ddrclk), GFP_KERNEL); in rockchip_clk_register_ddrclk()
103 if (!ddrclk) in rockchip_clk_register_ddrclk()
119 kfree(ddrclk); in rockchip_clk_register_ddrclk()
123 ddrclk->reg_base = reg_base; in rockchip_clk_register_ddrclk()
124 ddrclk->lock = lock; in rockchip_clk_register_ddrclk()
125 ddrclk->hw.init = &init; in rockchip_clk_register_ddrclk()
127 ddrclk->mux_shift = mux_shift; in rockchip_clk_register_ddrclk()
131 ddrclk->ddr_flag = ddr_flag; in rockchip_clk_register_ddrclk()
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| /linux-6.3-rc2/Documentation/devicetree/bindings/arm/marvell/ |
| A D | kirkwood.txt | 12 cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave",
14 between the "cpu_clk" and the "ddrclk".
26 clock-names = "cpu_clk", "ddrclk", "powersave";
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| /linux-6.3-rc2/Documentation/devicetree/bindings/clock/ |
| A D | mvebu-core-clock.txt | 18 3 = ddrclk (DDR clock)
24 3 = ddrclk (DDR clock)
37 2 = ddrclk (DDR clock)
44 3 = ddrclk (DDR controller clock derived from CPU0 clock)
49 2 = ddrclk (DDR controller clock derived from CPU0 clock)
72 output names ("tclk", "cpuclk", "l2clk", "ddrclk")
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | kirkwood.dtsi | 22 clock-names = "cpu_clk", "ddrclk", "powersave";
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