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/linux-6.3-rc2/drivers/gpu/drm/i915/
A DMakefile225 display/hsw_ips.o \
230 display/intel_bw.o \
249 display/intel_fb.o \
269 display/intel_tc.o \
286 display/dvo_ivch.o \
290 display/g4x_dp.o \
291 display/g4x_hdmi.o \
292 display/icl_dsi.o \
299 display/intel_dp.o \
318 display/intel_tv.o \
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A Di915_pci.c147 .display.color = { \
153 .display.color = { \
159 .display.color = { \
182 .display.has_gmch = 1, \
203 .display.has_gmch = 1, \
244 .display.has_gmch = 1, \
541 .display.has_gmch = 1,
640 .display.has_gmch = 1,
894 .display.has_dsb = 1
911 .display.has_hti = 1,
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/linux-6.3-rc2/Documentation/devicetree/bindings/display/
A Dallwinner,sun4i-a10-display-engine.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-engine.yaml#
52 - allwinner,sun4i-a10-display-engine
54 - allwinner,sun5i-a13-display-engine
55 - allwinner,sun6i-a31-display-engine
57 - allwinner,sun7i-a20-display-engine
58 - allwinner,sun8i-a23-display-engine
59 - allwinner,sun8i-a33-display-engine
61 - allwinner,sun8i-h3-display-engine
62 - allwinner,sun8i-r40-display-engine
63 - allwinner,sun8i-v3s-display-engine
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A Dcirrus,clps711x-fb.txt8 - display : phandle to a display node as described in
9 Documentation/devicetree/bindings/display/panel/display-timing.txt.
10 Additionally, the display node has to define properties:
25 display = <&display>;
28 display: display {
33 display-timings {
A Dallwinner,sun4i-a10-display-frontend.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml#
14 The display engine frontend does formats conversion, scaling,
20 - allwinner,sun4i-a10-display-frontend
21 - allwinner,sun5i-a13-display-frontend
22 - allwinner,sun6i-a31-display-frontend
23 - allwinner,sun7i-a20-display-frontend
24 - allwinner,sun8i-a23-display-frontend
25 - allwinner,sun8i-a33-display-frontend
26 - allwinner,sun9i-a80-display-frontend
92 fe0: display-frontend@1e00000 {
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/linux-6.3-rc2/drivers/gpu/drm/i915/display/
A Dintel_hotplug.c223 display.hotplug.reenable_work.work); in intel_hpd_irq_storm_reenable_work()
308 dev_priv->display.hotplug.long_port_mask = 0; in i915_digport_work_func()
310 dev_priv->display.hotplug.short_port_mask = 0; in i915_digport_work_func()
360 queue_work(i915->display.hotplug.dp_wq, &i915->display.hotplug.dig_port_work); in intel_hpd_trigger_irq()
370 display.hotplug.hotplug_work.work); in i915_hotplug_work_func()
383 dev_priv->display.hotplug.event_bits = 0; in i915_hotplug_work_func()
385 dev_priv->display.hotplug.retry_bits = 0; in i915_hotplug_work_func()
570 queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work); in intel_hpd_irq_handler()
614 display.hotplug.poll_init_work); in i915_hpd_poll_init_work()
741 dev_priv->display.hotplug.event_bits = 0; in intel_hpd_cancel_work()
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A Dintel_frontbuffer.c84 spin_lock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
86 spin_unlock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
114 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
118 spin_unlock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
134 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_complete()
138 spin_unlock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_complete()
158 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip()
161 spin_unlock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip()
173 spin_lock(&i915->display.fb_tracking.lock); in __intel_fb_invalidate()
194 spin_lock(&i915->display.fb_tracking.lock); in __intel_fb_flush()
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A Dintel_lpe_audio.c172 int irq = dev_priv->display.audio.lpe.irq; in lpe_audio_irq_init()
210 if (dev_priv->display.audio.lpe.irq < 0) { in lpe_audio_setup()
212 dev_priv->display.audio.lpe.irq); in lpe_audio_setup()
213 ret = dev_priv->display.audio.lpe.irq; in lpe_audio_setup()
230 if (IS_ERR(dev_priv->display.audio.lpe.platdev)) { in lpe_audio_setup()
246 irq_free_desc(dev_priv->display.audio.lpe.irq); in lpe_audio_setup()
248 dev_priv->display.audio.lpe.irq = -1; in lpe_audio_setup()
249 dev_priv->display.audio.lpe.platdev = NULL; in lpe_audio_setup()
308 irq_free_desc(dev_priv->display.audio.lpe.irq); in intel_lpe_audio_teardown()
310 dev_priv->display.audio.lpe.irq = -1; in intel_lpe_audio_teardown()
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A Dintel_cdclk.c1030 dev_priv->display.cdclk.hw.vco = vco; in skl_dpll0_enable()
1044 dev_priv->display.cdclk.hw.vco = 0; in skl_dpll0_disable()
1159 dev_priv->display.cdclk.hw.cdclk == dev_priv->display.cdclk.hw.bypass) in skl_sanitize_cdclk()
1179 dev_priv->display.cdclk.hw.cdclk = 0; in skl_sanitize_cdclk()
1181 dev_priv->display.cdclk.hw.vco = -1; in skl_sanitize_cdclk()
1563 dev_priv->display.cdclk.hw.vco = 0; in bxt_de_pll_disable()
1580 dev_priv->display.cdclk.hw.vco = vco; in bxt_de_pll_enable()
1592 dev_priv->display.cdclk.hw.vco = 0; in icl_cdclk_pll_disable()
1941 dev_priv->display.cdclk.hw.cdclk == dev_priv->display.cdclk.hw.bypass) in bxt_sanitize_cdclk()
1998 dev_priv->display.cdclk.hw.vco = -1; in bxt_sanitize_cdclk()
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A Dintel_dkl_phy.c40 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
45 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
61 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_write()
66 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_write()
82 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_rmw()
87 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_rmw()
100 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_posting_read()
105 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_posting_read()
A Dintel_audio.c492 mutex_lock(&i915->display.audio.mutex); in hsw_audio_codec_disable()
532 cdclk = i915->display.cdclk.hw.cdclk; in calc_hblank_early_prog()
634 mutex_lock(&i915->display.audio.mutex); in hsw_audio_codec_enable()
828 if (i915->display.funcs.audio) in intel_audio_codec_enable()
886 if (i915->display.funcs.audio) in intel_audio_codec_disable()
938 if (i915->display.funcs.audio) in intel_audio_codec_get_config()
1001 get_aud_ts_cdclk_m_n(i915->display.cdclk.hw.ref, i915->display.cdclk.hw.cdclk, &aud_ts); in intel_audio_cdclk_change_post()
1146 return i915->display.cdclk.hw.cdclk; in i915_audio_component_get_cdclk_freq()
1298 i915->display.audio.component = acomp; in i915_audio_component_bind()
1313 i915->display.audio.component = NULL; in i915_audio_component_unbind()
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A Dintel_hti.c18 if (INTEL_INFO(i915)->display.has_hti) in intel_hti_init()
19 i915->display.hti.state = intel_de_read(i915, HDPORT_STATE); in intel_hti_init()
27 return i915->display.hti.state & HDPORT_ENABLED && in intel_hti_uses_phy()
28 i915->display.hti.state & HDPORT_DDI_USED(phy); in intel_hti_uses_phy()
33 if (!(i915->display.hti.state & HDPORT_ENABLED)) in intel_hti_dpll_mask()
40 return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->display.hti.state); in intel_hti_dpll_mask()
A Dintel_display_power.c353 display.power.domains); in assert_async_put_domain_masks_disjoint()
366 display.power.domains); in __async_put_domains_state_ok()
389 display.power.domains); in print_power_domains()
404 display.power.domains); in print_async_put_domains_state()
610 display.power.domains); in queue_async_put_domains_work()
624 display.power.domains); in release_async_put_domains()
995 dev_priv->display.dmc.allowed_dc_mask = in intel_power_domains_init()
998 dev_priv->display.dmc.target_dc_state = in intel_power_domains_init()
1081 dev_priv->display.dbuf.enabled_slices = in gen9_dbuf_enable()
1089 dev_priv->display.dbuf.enabled_slices); in gen9_dbuf_enable()
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/linux-6.3-rc2/drivers/video/fbdev/omap2/omapfb/
A Domapfb-ioctl.c216 if (display && display->driver->sync) in omapfb_setup_mem()
217 display->driver->sync(display); in omapfb_setup_mem()
482 if (!display || !display->driver->memory_read) in omapfb_memory_read()
603 if (!display || !display->driver->sync) { in omapfb_ioctl()
609 r = display->driver->sync(display); in omapfb_ioctl()
614 if (!display || !display->driver->update) { in omapfb_ioctl()
632 if (!display || !display->driver->update) { in omapfb_ioctl()
800 if (!display || !display->driver->run_test) { in omapfb_ioctl()
815 if (!display || !display->driver->run_test) { in omapfb_ioctl()
863 if (!display || !display->driver->enable_te) { in omapfb_ioctl()
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/linux-6.3-rc2/drivers/acpi/acpica/
A Dutbuffer.c42 display &= ~DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
49 display = DB_BYTE_DISPLAY; in acpi_ut_dump_buffer()
69 acpi_os_printf("%*s", ((display * 2) + 1), " "); in acpi_ut_dump_buffer()
70 j += display; in acpi_ut_dump_buffer()
74 switch (display) { in acpi_ut_dump_buffer()
109 j += display; in acpi_ut_dump_buffer()
180 acpi_ut_dump_buffer(buffer, count, display, 0); in acpi_ut_debug_dump_buffer()
219 display = DB_BYTE_DISPLAY; in acpi_ut_dump_buffer_to_file()
238 j += display; in acpi_ut_dump_buffer_to_file()
242 switch (display) { in acpi_ut_dump_buffer_to_file()
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/linux-6.3-rc2/Documentation/devicetree/bindings/display/sprd/
A Dsprd,display-subsystem.yaml4 $id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml#
14 DPU devices or other display interface nodes that comprise the
17 Unisoc's display pipeline have several components as below description,
18 multi display controllers and corresponding physical interfaces.
19 For different display scenarios, dpu0 and dpu1 maybe binding to different
23 dpu0 and dpu1 both binding to DSI for dual mipi-dsi display;
24 dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display;
44 const: sprd,display-subsystem
51 Should contain a list of phandles pointing to display interface port
62 display-subsystem {
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/linux-6.3-rc2/drivers/staging/fbtft/
A Dfbtft-core.c555 if (display->gamma_num * display->gamma_len > in fbtft_framebuffer_alloc()
583 display->debug = pdata->display.debug; in fbtft_framebuffer_alloc()
585 display->backlight = pdata->display.backlight; in fbtft_framebuffer_alloc()
587 display->width = pdata->display.width; in fbtft_framebuffer_alloc()
589 display->height = pdata->display.height; in fbtft_framebuffer_alloc()
591 display->buswidth = pdata->display.buswidth; in fbtft_framebuffer_alloc()
593 display->regwidth = pdata->display.regwidth; in fbtft_framebuffer_alloc()
609 vmem_size = display->width * display->height * bpp / 8; in fbtft_framebuffer_alloc()
626 if (display->gamma_num && display->gamma_len) { in fbtft_framebuffer_alloc()
1232 if (display->regwidth == 8 && display->buswidth == 8) in fbtft_probe_common()
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/linux-6.3-rc2/Documentation/devicetree/bindings/auxdisplay/
A Dmodtronix,lcd2s.yaml14 The display supports a serial I2C and SPI interface. The driver currently
24 I2C bus address of the display.
26 display-height-chars:
27 description: Height of the display, in character cells.
32 display-width-chars:
33 description: Width of the display, in character cells.
41 - display-height-chars
42 - display-width-chars
55 display-height-chars = <4>;
56 display-width-chars = <20>;
A Dhit,hd44780.yaml54 display-height-chars:
55 description: Height of the display, in character cells,
60 display-width-chars:
61 description: Width of the display, in character cells.
69 display-width-chars for displays with more than 2 lines).
79 - display-height-chars
80 - display-width-chars
97 display-height-chars = <2>;
98 display-width-chars = <16>;
115 display-height-chars = <2>;
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/linux-6.3-rc2/Documentation/devicetree/bindings/display/tegra/
A Dnvidia,tegra186-display.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
69 "^display@[0-9a-f]+$":
125 display-hub@15200000 {
149 display@15200000 {
168 display@15210000 {
187 display@15220000 {
214 display-hub@15200000 {
237 display@15200000 {
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/linux-6.3-rc2/Documentation/devicetree/bindings/display/panel/
A Ddisplay-timings.yaml4 $id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
7 title: display timings
15 A display panel may be able to handle several display timings,
17 The display-timings node makes it possible to specify the timings
18 and to specify the timing that is native for the display.
22 const: display-timings
27 The default display timing is the one specified as native-mode.
46 display-timings {
/linux-6.3-rc2/drivers/gpu/drm/amd/display/modules/hdcp/
A Dhdcp.c255 struct mod_hdcp_display *display, in update_display_adjustments() argument
262 display->adjust.disable == true && in update_display_adjustments()
264 display->adjust.disable = false; in update_display_adjustments()
271 display->adjust.disable = true; in update_display_adjustments()
275 memcmp(adj, &display->adjust, in update_display_adjustments()
361 *display_container = *display; in mod_hdcp_add_display()
389 if (!display) { in mod_hdcp_remove_display()
435 if (!display) { in mod_hdcp_update_display()
471 display->adjust = *display_adjust; in mod_hdcp_update_display()
492 if (!display) { in mod_hdcp_query_display()
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/linux-6.3-rc2/drivers/gpu/drm/nouveau/nvkm/engine/gr/
A Dnv50.c302 if (display) { in nv50_gr_mp_trap()
348 if (display) { in nv50_gr_tp_trap()
377 if (display) in nv50_gr_tp_trap()
384 if (display) in nv50_gr_tp_trap()
439 if (display) { in nv50_gr_trap_handler()
487 if (display) { in nv50_gr_trap_handler()
510 if (display) { in nv50_gr_trap_handler()
530 if (display) { in nv50_gr_trap_handler()
553 if (display) { in nv50_gr_trap_handler()
579 if (display) in nv50_gr_trap_handler()
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/linux-6.3-rc2/Documentation/userspace-api/media/v4l/
A Dext-ctrls-colorimetry.rst49 The mastering display defines the color volume (the color primaries,
50 white point and luminance range) of a display considered to be the
51 mastering display for the current video content.
66 For describing the mastering display that uses Red, Green and Blue
74 For describing the mastering display that uses Red, Green and Blue
81 point of the mastering display in increments of 0.00002.
85 point of the mastering display in increments of 0.00002.
88 - Specifies the nominal maximum display luminance of the mastering
89 display in units of 0.0001 cd/m\ :sup:`2`.
92 - specifies the nominal minimum display luminance of the mastering
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/linux-6.3-rc2/Documentation/devicetree/bindings/display/rockchip/
A Drockchip-drm.yaml4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
15 vop devices or other display interface nodes that comprise the
20 const: rockchip,display-subsystem
27 Should contain a list of phandles pointing to display interface port
29 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml
39 display-subsystem {
40 compatible = "rockchip,display-subsystem";

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