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Searched refs:dml (Results 1 – 25 of 35) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/
A DMakefile62 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_ccflags)
63 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_vba.o := $(dml_ccflags)
64 CFLAGS_$(AMDDALPATH)/dc/dml/dcn10/dcn10_fpu.o := $(dml_ccflags)
65 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/dcn20_fpu.o := $(dml_ccflags)
78 CFLAGS_$(AMDDALPATH)/dc/dml/dcn314/dcn314_fpu.o := $(dml_ccflags)
79 CFLAGS_$(AMDDALPATH)/dc/dml/dcn30/dcn30_fpu.o := $(dml_ccflags)
80 CFLAGS_$(AMDDALPATH)/dc/dml/dcn32/dcn32_fpu.o := $(dml_ccflags)
85 CFLAGS_$(AMDDALPATH)/dc/dml/dcn31/dcn31_fpu.o := $(dml_ccflags)
89 CFLAGS_$(AMDDALPATH)/dc/dml/dsc/rc_calc_fpu.o := $(dml_ccflags)
90 CFLAGS_$(AMDDALPATH)/dc/dml/calcs/dcn_calcs.o := $(dml_ccflags)
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddcn30_fpu.c294 if (dc->dml.ip.writeback_max_hscl_taps > 1) { in dcn30_fpu_populate_dml_writeback_from_context()
348 struct display_mode_lib *dml, in dcn30_fpu_set_mcif_arb_params() argument
383 int maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb; in dcn30_fpu_calculate_wm_and_dlg()
385 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][maxMpcComb]; in dcn30_fpu_calculate_wm_and_dlg()
390 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn30_fpu_calculate_wm_and_dlg()
391 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
449 unsigned int min_dram_speed_mts = context->bw_ctx.dml.vba.DRAMSpeed; in dcn30_fpu_calculate_wm_and_dlg()
452 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == … in dcn30_fpu_calculate_wm_and_dlg()
527 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn30_fpu_calculate_wm_and_dlg()
635 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn30_find_dummy_latency_index_for_fw_based_mclk_switch()
[all …]
A Ddcn30_fpu.h39 struct display_mode_lib *dml,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c378 context->bw_ctx.dml.soc.clock_limits[context->bw_ctx.dml.soc.num_states - 1].dispclk_mhz, in dcn32_predict_pipe_split()
379 context->bw_ctx.dml.soc.clock_limits[context->bw_ctx.dml.soc.num_states - 1].dispclk_mhz, in dcn32_predict_pipe_split()
382 context->bw_ctx.dml.ip.max_num_dpp, in dcn32_predict_pipe_split()
419 …else if (clk_frequency > context->bw_ctx.dml.soc.clock_limits[context->bw_ctx.dml.soc.num_states -… in dcn32_predict_pipe_split()
545 …unsigned int dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcCo… in dcn32_set_phantom_stream_timing()
1331 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn32_calculate_dlg_params()
1342 …usr_retraining_support = context->bw_ctx.dml.vba.USRRetrainingSupport[vlevel][context->bw_ctx.dml.… in dcn32_calculate_dlg_params()
1453 context->bw_ctx.dml.funcs.rq_dlg_get_dlg_reg_v2(&context->bw_ctx.dml, in dcn32_calculate_dlg_params()
1919 …double dcfclk_from_validation = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vb… in dcn32_calculate_wm_and_dlg_fpu()
1921 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.ma… in dcn32_calculate_wm_and_dlg_fpu()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c295 struct display_mode_lib *dml, in calculate_wm_set_for_vlevel() argument
301 ASSERT(vlevel < dml->soc.num_states); in calculate_wm_set_for_vlevel()
304 pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz; in calculate_wm_set_for_vlevel()
305 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
307 dml->soc.dram_clock_change_latency_us = table_entry->pstate_latency_us; in calculate_wm_set_for_vlevel()
308 dml->soc.sr_exit_time_us = table_entry->sr_exit_time_us; in calculate_wm_set_for_vlevel()
311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
437 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg_fp()
442 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg_fp()
447 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg_fp()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1063 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn20_calculate_dlg_params()
1115 …bool cstate_en = context->bw_ctx.dml.vba.PrefetchMode[vlevel][context->bw_ctx.dml.vba.maxMpcComb] … in dcn20_calculate_dlg_params()
1123 context->bw_ctx.dml.funcs.rq_dlg_get_dlg_reg(&context->bw_ctx.dml, in dcn20_calculate_dlg_params()
1133 context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(&context->bw_ctx.dml, in dcn20_calculate_dlg_params()
1638 context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn20_calculate_wm()
1647 …context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_from… in dcn20_calculate_wm()
1942 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn20_validate_bandwidth_internal()
2086 struct display_mode_lib *dml, in calculate_wm_set_for_vlevel() argument
2092 ASSERT(vlevel < dml->soc.num_states); in calculate_wm_set_for_vlevel()
2138 … context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn21_calculate_wm()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddcn31_fpu.c469 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
470 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latenc… in dcn315_update_soc_for_wm_a()
473 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = in dcn315_update_soc_for_wm_a()
475 context->bw_ctx.dml.soc.sr_exit_time_us = in dcn315_update_soc_for_wm_a()
487 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp()
491 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn31_calculate_wm_and_dlg_fp()
492 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn31_calculate_wm_and_dlg_fp()
552 …context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_d… in dcn31_calculate_wm_and_dlg_fp()
647 dml_init_instance(&dc->dml, &dcn3_1_soc, &dcn3_1_ip, DML_PROJECT_DCN31); in dcn31_update_bw_bounding_box()
800 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = max_dispclk_mhz * 2; in dcn316_update_bw_bounding_box()
[all …]
/linux-6.3-rc2/net/packet/
A Ddiag.c49 struct packet_diag_mclist *dml; in pdiag_put_mclist() local
51 dml = nla_reserve_nohdr(nlskb, sizeof(*dml)); in pdiag_put_mclist()
52 if (!dml) { in pdiag_put_mclist()
58 dml->pdmc_index = ml->ifindex; in pdiag_put_mclist()
59 dml->pdmc_type = ml->type; in pdiag_put_mclist()
60 dml->pdmc_alen = ml->alen; in pdiag_put_mclist()
61 dml->pdmc_count = ml->count; in pdiag_put_mclist()
62 BUILD_BUG_ON(sizeof(dml->pdmc_addr) != sizeof(ml->addr)); in pdiag_put_mclist()
63 memcpy(dml->pdmc_addr, ml->addr, sizeof(ml->addr)); in pdiag_put_mclist()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/calcs/
A Ddcn_calcs.c458 struct display_mode_lib *dml = (struct display_mode_lib *)(&dc->dml); in dcn_bw_calc_rq_dlg_ttu() local
508 dml1_extract_rq_regs(dml, rq_regs, rq_param); in dcn_bw_calc_rq_dlg_ttu()
510 dml, in dcn_bw_calc_rq_dlg_ttu()
1294 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = in dcn_validate_bandwidth()
1705 dc->dml.soc.ideal_dram_bw_after_urgent_percent = in dcn_bw_sync_calcs_and_dml()
1709 dc->dml.soc.round_trip_ping_latency_dcfclk_cycles = in dcn_bw_sync_calcs_and_dml()
1733 dc->dml.ip.max_num_dpp = dc->dcn_ip->max_num_dpp; in dcn_bw_sync_calcs_and_dml()
1734 dc->dml.ip.max_num_wb = dc->dcn_ip->max_num_writeback; in dcn_bw_sync_calcs_and_dml()
1741 dc->dml.ip.max_hscl_taps = dc->dcn_ip->max_hscl_taps; in dcn_bw_sync_calcs_and_dml()
1742 dc->dml.ip.max_vscl_taps = dc->dcn_ip->max_vscl_taps; in dcn_bw_sync_calcs_and_dml()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddcn314_fpu.c265 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = max_dispclk_mhz * 2; in dcn314_update_bw_bounding_box_fpu()
271 dml_init_instance(&dc->dml, &dcn3_14_soc, &dcn3_14_ip, DML_PROJECT_DCN314); in dcn314_update_bw_bounding_box_fpu()
273 dml_init_instance(&dc->dml, &dcn3_14_soc, &dcn3_14_ip, DML_PROJECT_DCN31_FPGA); in dcn314_update_bw_bounding_box_fpu()
346 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_14_DEFAULT_DET_SIZE; in dcn314_populate_dml_pipes_from_context_fpu()
356 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn314_populate_dml_pipes_from_context_fpu()
361 context->bw_ctx.dml.ip.det_buffer_size_kbytes = dc->debug.crb_alloc_policy * 64; in dcn314_populate_dml_pipes_from_context_fpu()
363 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn314_populate_dml_pipes_from_context_fpu()
376 context->bw_ctx.dml.vba.ODMCombinePolicy = dm_odm_combine_policy_2to1; in dcn314_populate_dml_pipes_from_context_fpu()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn10/
A Ddcn10_fpu.c133 struct display_mode_lib *dml = &dc->dml; in dcn10_resource_construct_fp() local
135 dml->ip.max_num_dpp = 3; in dcn10_resource_construct_fp()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c842 context->bw_ctx.dml.soc.allow_dram_self_refresh_or_dram_clock_change_in_vblank = in dcn21_fast_validate_bw()
844 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn21_fast_validate_bw()
846 if (vlevel > context->bw_ctx.dml.soc.num_states) { in dcn21_fast_validate_bw()
854 context->bw_ctx.dml.soc.allow_dram_self_refresh_or_dram_clock_change_in_vblank = in dcn21_fast_validate_bw()
856 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn21_fast_validate_bw()
857 if (vlevel > context->bw_ctx.dml.soc.num_states) in dcn21_fast_validate_bw()
866 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn21_fast_validate_bw()
920 …dcn20_fpu_adjust_dppclk(&context->bw_ctx.dml.vba, vlevel, context->bw_ctx.dml.vba.maxMpcComb, pipe… in dcn21_fast_validate_bw()
924 if (context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn21_fast_validate_bw()
946 context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] = in dcn21_fast_validate_bw()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_resource.c1398 struct display_mode_lib *dml = &context->bw_ctx.dml; in dcn30_set_mcif_arb_params() local
1660 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn30_internal_validate_bw()
1666 context->bw_ctx.dml.vba.maxMpcComb = 0; in dcn30_internal_validate_bw()
1667 context->bw_ctx.dml.vba.VoltageLevel = 0; in dcn30_internal_validate_bw()
1677 dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn30_internal_validate_bw()
1689 if (vlevel < context->bw_ctx.dml.soc.num_states) in dcn30_internal_validate_bw()
1706 if (vlevel < context->bw_ctx.dml.soc.num_states) { in dcn30_internal_validate_bw()
1713 dml_log_mode_support_params(&context->bw_ctx.dml); in dcn30_internal_validate_bw()
1715 if (vlevel == context->bw_ctx.dml.soc.num_states) in dcn30_internal_validate_bw()
1888 context->bw_ctx.dml.vba.VoltageLevel = vlevel; in dcn30_internal_validate_bw()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn302/
A Ddcn302_fpu.c218 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn302_fpu_update_bw_bounding_box()
333 dml_init_instance(&dc->dml, &dcn3_02_soc, &dcn3_02_ip, DML_PROJECT_DCN30); in dcn302_fpu_update_bw_bounding_box()
335 dml_init_instance(&dc->current_state->bw_ctx.dml, &dcn3_02_soc, &dcn3_02_ip, DML_PROJECT_DCN30); in dcn302_fpu_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn303/
A Ddcn303_fpu.c214 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn303_fpu_update_bw_bounding_box()
341 dml_init_instance(&dc->dml, &dcn3_03_soc, &dcn3_03_ip, DML_PROJECT_DCN30); in dcn303_fpu_update_bw_bounding_box()
343 dml_init_instance(&dc->current_state->bw_ctx.dml, &dcn3_03_soc, &dcn3_03_ip, DML_PROJECT_DCN30); in dcn303_fpu_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/
A DMakefile25 DC_LIBS = basics bios dml clk_mgr dce gpio irq link virtual
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c1862 struct vba_vars_st *v = &context->bw_ctx.dml.vba; in dcn20_validate_apply_pipe_split_flags()
1917 for (vlevel_split = vlevel; vlevel <= context->bw_ctx.dml.soc.num_states; vlevel++) in dcn20_validate_apply_pipe_split_flags()
1922 if (vlevel > context->bw_ctx.dml.soc.num_states) in dcn20_validate_apply_pipe_split_flags()
2069 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn20_fast_validate_bw()
2071 if (vlevel > context->bw_ctx.dml.soc.num_states) in dcn20_fast_validate_bw()
2089 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn20_fast_validate_bw()
2108 && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) in dcn20_fast_validate_bw()
2118 …dcn20_fpu_adjust_dppclk(&context->bw_ctx.dml.vba, vlevel, context->bw_ctx.dml.vba.maxMpcComb, pipe… in dcn20_fast_validate_bw()
2122 if (context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn20_fast_validate_bw()
2144 context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] = in dcn20_fast_validate_bw()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn315/
A Ddcn315_resource.c1649 …const int max_usable_det = context->bw_ctx.dml.ip.config_return_buffer_size_in_kbytes - DCN3_15_MI… in dcn315_populate_dml_pipes_from_context()
1699 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn315_populate_dml_pipes_from_context()
1701 if (context->bw_ctx.dml.ip.det_buffer_size_kbytes > DCN3_15_MAX_DET_SIZE) in dcn315_populate_dml_pipes_from_context()
1702 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_15_MAX_DET_SIZE; in dcn315_populate_dml_pipes_from_context()
1703 ASSERT(context->bw_ctx.dml.ip.det_buffer_size_kbytes >= DCN3_15_DEFAULT_DET_SIZE); in dcn315_populate_dml_pipes_from_context()
1709 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn315_populate_dml_pipes_from_context()
1713 && pipe->stream->timing.pix_clk_100hz < dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)) { in dcn315_populate_dml_pipes_from_context()
1715 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn315_populate_dml_pipes_from_context()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn316/
A Ddcn316_resource.c1651 …const int max_usable_det = context->bw_ctx.dml.ip.config_return_buffer_size_in_kbytes - DCN3_16_MI… in dcn316_populate_dml_pipes_from_context()
1701 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn316_populate_dml_pipes_from_context()
1703 if (context->bw_ctx.dml.ip.det_buffer_size_kbytes > DCN3_16_MAX_DET_SIZE) in dcn316_populate_dml_pipes_from_context()
1704 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_16_MAX_DET_SIZE; in dcn316_populate_dml_pipes_from_context()
1705 ASSERT(context->bw_ctx.dml.ip.det_buffer_size_kbytes >= DCN3_16_DEFAULT_DET_SIZE); in dcn316_populate_dml_pipes_from_context()
1711 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn316_populate_dml_pipes_from_context()
1714 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn316_populate_dml_pipes_from_context()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_resource.c876 ctx->dc->dml.ip.det_buffer_size_kbytes, in dcn32_hubbub_create()
877 ctx->dc->dml.ip.pixel_chunk_size_kbytes, in dcn32_hubbub_create()
878 ctx->dc->dml.ip.config_return_buffer_size_in_kbytes); in dcn32_hubbub_create()
1846 context->bw_ctx.dml.soc.dram_clock_change_requirement_final = true; in dcn32_validate_bandwidth()
1894 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn32_validate_bandwidth()
2021 context->bw_ctx.dml.soc.dram_clock_change_requirement_final = false; in dcn32_populate_dml_pipes_from_context()
2023 context->bw_ctx.dml.soc.dram_clock_change_requirement_final = true; in dcn32_populate_dml_pipes_from_context()
2301 dml_init_instance(&dc->dml, &dcn3_2_soc, &dcn3_2_ip, DML_PROJECT_DCN32); in dcn32_resource_construct()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c554 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn321_update_bw_bounding_box_fpu()
698 dml_init_instance(&dc->dml, &dcn3_21_soc, &dcn3_21_ip, DML_PROJECT_DCN32); in dcn321_update_bw_bounding_box_fpu()
700 dml_init_instance(&dc->current_state->bw_ctx.dml, &dcn3_21_soc, &dcn3_21_ip, DML_PROJECT_DCN32); in dcn321_update_bw_bounding_box_fpu()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_resource.c1729 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_1_DEFAULT_DET_SIZE; in dcn31_populate_dml_pipes_from_context()
1737 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn31_populate_dml_pipes_from_context()
1742 context->bw_ctx.dml.ip.det_buffer_size_kbytes = dc->debug.crb_alloc_policy * 64; in dcn31_populate_dml_pipes_from_context()
1744 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn31_populate_dml_pipes_from_context()
1823 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn31_validate_bandwidth()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_types.h498 struct display_mode_lib dml; member
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c2169 memcpy(&context->bw_ctx.dml, &dc->dml, sizeof(struct display_mode_lib)); in init_state()
4250 struct display_mode_lib *dml; in dc_set_power_state() local
4278 dml = kzalloc(sizeof(struct display_mode_lib), in dc_set_power_state()
4281 ASSERT(dml); in dc_set_power_state()
4282 if (!dml) in dc_set_power_state()
4288 memcpy(dml, &dc->current_state->bw_ctx.dml, sizeof(struct display_mode_lib)); in dc_set_power_state()
4295 dc->current_state->bw_ctx.dml = *dml; in dc_set_power_state()
4297 kfree(dml); in dc_set_power_state()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn321/
A Ddcn321_resource.c875 ctx->dc->dml.ip.det_buffer_size_kbytes, in dcn321_hubbub_create()
876 ctx->dc->dml.ip.pixel_chunk_size_kbytes, in dcn321_hubbub_create()
877 ctx->dc->dml.ip.config_return_buffer_size_in_kbytes); in dcn321_hubbub_create()
1847 dml_init_instance(&dc->dml, &dcn3_21_soc, &dcn3_21_ip, DML_PROJECT_DCN32); in dcn321_resource_construct()

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